mc68hc912bc32 Freescale Semiconductor, Inc, mc68hc912bc32 Datasheet - Page 75
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mc68hc912bc32
Manufacturer Part Number
mc68hc912bc32
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC912BC32.pdf
(334 pages)
- Current page: 75 of 334
- Download datasheet (2Mb)
Chapter 5
Operating Modes and Resource Mapping
5.1 Introduction
The MCU can operate in eight different modes. Each mode has a different default memory map and
external bus configuration. After reset, most system resources can be mapped to other addresses by
writing to the appropriate control registers.
5.2 Operating Modes
The states of the BKGD, MODB, and MODA pins during reset determine the operating mode after reset.
The SMODN, MODB, and MODA bits in the MODE register show current operating mode and provide
limited mode switching during operation. The states of the BKGD, MODB, and MODA pins are latched
into these bits on the rising edge of the reset signal. During reset an active pullup is connected to the
BKGD pin (as input) and active pulldowns are connected to the MODB and MODA pins. If an open occurs
on any of these pins, the device will operate in normal single-chip mode.
The two basic types of operating modes are:
A system development and debug feature, background debug mode (BDM) is available in all modes. In
special single-chip mode, BDM is active immediately after reset.
Freescale Semiconductor
BKGD
1. Normal modes — Some registers and bits are protected against accidental changes.
2. Special modes — Protected control registers and bits are allowed greater access for special
0
0
0
0
1
1
1
1
purposes such as testing and emulation.
MODB
0
0
1
1
0
0
1
1
MODA
0
1
0
1
0
1
0
1
Special expanded narrow
Normal expanded narrow
Special expanded wide
Normal expanded wide
(forced to peripheral)
Special single chip
Normal single chip
Special peripheral
M68HC12B Family Data Sheet, Rev. 9.1
Reserved
Table 5-1. Mode Selection
Mode
General-purpose I/O
General-purpose I/O
ADDR[15:8]
ADDR[15:8]
DATA[7:0]
DATA[7:0]
Port A
ADDR
ADDR
ADDR
DATA
DATA
DATA
—
General-purpose I/O
General-purpose I/O
ADDR[7:0]
ADDR[7:0]
Port B
ADDR
ADDR
ADDR
DATA
DATA
DATA
—
75
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