mc68hc912bc32 Freescale Semiconductor, Inc, mc68hc912bc32 Datasheet - Page 206

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mc68hc912bc32

Manufacturer Part Number
mc68hc912bc32
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Serial Interface
SPC0 — Serial Pin Control 0 Bit
14.3.5.3 SPI Baud Rate Register
Read: Anytime
Write: Anytime
At reset, E clock divided by 2 is selected.
SPR2–SPR0 — SPI Clock (SCK) Rate Select Bits
206
This bit decides serial pin configurations with MSTR control bit.
These bits are used to specify the SPI clock rate.
#1
#2
#3
#4
1. The serial pin control 0 bit enables bidirectional configurations.
2. Slave output is enabled if DDS4 = 1, SS = 0, and MSTR = 0. (#1, #3)
3. Master output is enabled if DDS5 = 1 and MSTR = 1. (#2, #4)
4. SCK output is enabled if DDS6 = 1 and MSTR = 1. (#2, #4)
5. SS output is enabled if DDS7 = 1, SSOE = 1, and MSTR = 1. (#2, #4)
Pin Mode
Bidirectional
Normal
Address:
SPR2
Reset:
Read:
Write:
0
0
0
0
1
1
1
1
SPC0
SPR1
$00D2
Bit 7
0
0
0
0
1
1
0
0
1
1
0
1
Figure 14-17. SPI Baud Rate Register (SP0BR)
(1)
= Unimplemented
SPR0
Table 14-5. SPI Clock Rate Selection
MSTR
0
1
0
1
0
1
0
1
M68HC12B Family Data Sheet, Rev. 9.1
6
0
0
0
1
0
1
Table 14-4. Serial Pin Control
E Clock
Divisor
General-purposeI/O
128
256
16
32
64
5
0
0
2
4
8
Slave out
Master in
Slave I/O
MISO
(2)
4
0
0
E Clock = 4 MHz
Frequency at
62.5 kHz
31.3 kHz
15.6 kHz
2.0 MHz
1.0 MHz
500 kHz
250 kHz
125 kHz
3
0
0
General-purposeI/O
Master out
Master I/O
MOSI
Slave in
SPR2
2
0
E Clock = 8 MHz
(3)
Frequency at
62.5 kHz
31.3 kHz
4.0 MHz
2.0 MHz
1.0 MHz
500 kHz
250 kHz
125 kHz
SPR1
1
0
Freescale Semiconductor
SCK out
SCK out
SCK in
SCK
SCK in
SPR0
(4)
Bit 0
0
SS I/O
SS I/O
SS in
SS in
SS
(5)

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