mc68hc912bc32 Freescale Semiconductor, Inc, mc68hc912bc32 Datasheet - Page 242

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mc68hc912bc32

Manufacturer Part Number
mc68hc912bc32
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Byte Data Link Communications (BDLC)
15.9.7 Port DLC Data Register
Read: Anytime
Write: Anytime
This register holds data to be driven out on port DLC pins or data received from port DLC pins.
When configured as an input, a read returns the pin level. When configured as output, a read returns the
latched output data.
Writes do not change pin state when the pins are configured for BDLC output. Upon reset, pins are
configured for general-purpose high impedance inputs.
15.9.8 Port DLC Data Direction Register
Read: Anytime
Write: Anytime
DDDLC6–DDDLC0 — Data Direction Port DLC Bits
242
1 = Configure I/O pin for output
0 = Configure I/O pin for input only
Alternate Pin Function:
Address: $00FE
Address:
Reset:
Read:
Write:
Figure 15-20. Port DLC Data Direction Register (DDRDLC)
Reset:
Read:
Write:
Bit 7
$00FF
Figure 15-19. Port DLC Data Register (PORTDLC)
0
0
Bit 7
0
0
= Unimplemented
DDDLC6
6
0
M68HC12B Family Data Sheet, Rev. 9.1
= Unimplemented
Bit 6
U
6
DDDLC5
5
0
Bit 5
U
5
DDDLC4
4
0
U = Unaffected
Bit 4
U
4
DDDLC3
3
0
Bit 3
U
3
DDDLC2
2
0
Bit 2
U
2
DDDLC1
1
0
DLCTX
Freescale Semiconductor
Bit 1
U
1
DDDLC0
Bit 0
0
DLCRX
Bit 0
Bit 0
U

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