mc68hc908qz16 Freescale Semiconductor, Inc, mc68hc908qz16 Datasheet - Page 228

• Manufacturer Part Number: mc68hc908qz16
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

System Integration Module (SIM)
16.7.1 Break Status Register
The break status register (BSR) contains a flag to indicate that a break caused an exit from wait mode.
This register is only used in emulation mode.
SBSW — SIM Break Stop/Wait
16.7.2 SIM Reset Status Register
This register contains six flags that show the source of the last reset provided all previous reset status bits
have been cleared. Clear the SIM reset status register by reading it. A power-on reset sets the POR bit
and clears all other bits in the register.
POR — Power-On Reset Bit
PIN — External Reset Bit
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
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SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
1 = Wait mode was exited by break interrupt.
0 = Wait mode was not exited by break interrupt.
1 = Last reset caused by POR circuit
0 = Read of SRSR
1 = Last reset caused by external reset pin (RST)
0 = POR or read of SRSR
1 = Last reset caused by COP counter
0 = POR or read of SRSR
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
Address:
Address:
Reset:
Reset:
Read:
Read:
Write:
Write:
1. Writing a logic 0 clears SBSW.
$FE00
$FE01
POR
Bit 7
Bit 7
R
R
0
1
Figure 16-21. SIM Reset Status Register (SRSR)
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Figure 16-20. Break Status Register (BSR)
= Unimplemented
= Reserved
PIN
R
6
0
6
0
COP
R
5
0
5
0
ILOP
R
4
0
4
0
ILAD
R
3
0
3
0
MODRST
R
2
0
2
0
Note
SBSW
LVI
1
0
1
0
(1)
Freescale Semiconductor
Bit 0
Bit 0
R
0
0
0