z80189 ZiLOG Semiconductor, z80189 Datasheet - Page 93
z80189
Manufacturer Part Number
z80189
Description
Z80180, Z8s180, Z8l180 Mpu Operation
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z80189.pdf
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78
UM005003-0703
Z8018x
Family MPU User Manual
A0
D0
MREQ
IORQ
–
INT0
–
A19
WR
Phi
RD
M1
D7
ST
Figure 38.
INT0 Mode 2
This method determines the restart address by reading the contents of a
table residing in memory. The vector table consists of up to 128 two-byte
restart addresses stored in low byte, high byte order.
Last MC
INT0 Mode 1 Timing
T1
T2
TW*
INT0 Acknowledge Cycle
PC
TW*
T3
T1
*Two Wait States are automatically inserted
PC is pushed onto stack
T2
SP-1
PCH
T3
T1
T2
SP-2
PCL
T3
T1
Op Code Fetch Cycle
T2
0038H
T3
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