z80189 ZiLOG Semiconductor, z80189 Datasheet - Page 184
z80189
Manufacturer Part Number
z80189
Description
Z80180, Z8s180, Z8l180 Mpu Operation
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z80189.pdf
(326 pages)
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Co
Rs
CL1, CL2
Item
Frequency
Note:
Table 25.
If an external clock input is used instead of a crystal, the waveform (twice
the clock rate) must exhibit a 50% ± 10% duty cycle.
Figure 70.
Figure 71 illustrates the Z8X180 clock generator circuit while Figures 72
and 72 specify circuit board design rules.
Clock
The minimum clock input High voltage level is V
external clock input is connected to the EXTAL pin, while the
XTAL pin is left open. Figure 70 depicts the external clock
interface.
EXTAL
XTAL
Z8X180 Operating Frequencies
10 to 22 pF
External Clock Interface
4MHz
<
<
3
2
60
7 pF
W
Open
±
10%
4MHz
10 to 22 pF
External Clock Input
<
<
<
f
60
7 pF
£
Family MPU User Manual
W
12MHz 12MHz
±
10%
10 to 22 pF
UM005003-0703
CC
<
<
<
–0.6V. The
60
7 pF
Z8018x
f
£
W
±
33MHz
10%
169
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