z80189 ZiLOG Semiconductor, z80189 Datasheet - Page 214
z80189
Manufacturer Part Number
z80189
Description
Z80180, Z8s180, Z8l180 Mpu Operation
Manufacturer
ZiLOG Semiconductor
Datasheet
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198
UM005003-0703
Z8018x
Family MPU User Manual
A19–0, D7–0
MREQ, RD
WR, IORQ
INT0,1,2
BUSREQ
Data IN
BUSACK
MREQ
RFSH
IORQ
PHI
HALT
NMI
M1
Memory Read/Write Cycle timing is the sam as I/O Read/Write Cycle
except there are no automatica Wait States (TW), and MREQ is active
instead of IORQ.
Figure 82.
34
31
33
35
AC Timing Diagram 2
32
39
41
38
36
43
10
Output Buffer Off
34
40
30
35
37
42
38
44
28
15
14
16
29
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