atam510 ATMEL Corporation, atam510 Datasheet - Page 37

• Manufacturer Part Number: atam510
• Description: Marc4 4-bit Mtp Universal Microcontroller
• Manufacturer: ATMEL Corporation

3.5.1
3.5.1.1
4711B–4BMCU–01/05
General Timer/Counter Control Registers
Timer/Counter Clock Control Register (TCCR)
With the exception of the Timer 0 Interrupt Status Register (T0SR), all the timer/counter regis-
ters are indirectly addressed using extended addressing as described in the section “Addressing
Peripherals”. An overview of all register and subport addresses is shown in
23. The Timer/Counter auxiliary register (TCSUB) holds the subport address of the particular
register about to be accessed.
Care has to be taken to ensure that this subport access sequence is not interrupted. Please
refer to the “HARDC510.SCR” hardware interface file as a programming guideline.
Table 3-9.
Note:
The Timer/Counter Clock Control Register (TCCR) controls the clock source to both Timer 0 and
Timer 1 prescalers. If an external clock source (on BP40 or TIM1) is selected, then the corre-
sponding port direction is automatically switched to input mode (see
Note:
T0CL2, T0CL1 - Timer 0 Clock source select
T1CL2, T1CL1 - Timer 1 Clock source select
3 2 1 0
x x 0 0
x x 0 1
x x 1 0
x x 1 1
0 0 x x
0 1 x x
1 0 x x
1 1 x x
Code
TCCR
1. If TCIO0 = low (connects Timer 0 to Port 4)
The TCIO0 bit must be set low for the BP40 external timer/counter access.
Function
Timer 0 clock = SUBCL
Timer 0 clock = SYSCL
Timer 0 clock = Timer1 output (T1OUT connected internally)
Timer 0 clock = T0IN0 (BP40
Timer 1 clock = SUBCL
Timer 1 clock = SYSCL
Timer 1 clock = Timer 0 output (T0OUT0 connected internally)
Timer 1 clock = TIM1
Timer/Counter Clock Control Register (TCCR)
T1CL2
Bit 3
Subport address (indirect write access): '6'hex of Port address '9'hex
T1CL1
Bit 2
(1)
)
T0CL2
Bit 1
T0CL1
Bit 0
Figure 3-11 on page
Reset value: 1111b
Direction (TDir)
out
out
out
in
Table 3-1 on page
x
x
x
x
ATAM510
BP40
(1)
TIM1
out
out
out
in
x
x
x
x
36).
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