atam510 ATMEL Corporation, atam510 Datasheet - Page 29
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atam510
Manufacturer Part Number
atam510
Description
Marc4 4-bit Mtp Universal Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.ATAM510.pdf
(72 pages)
- Current page: 29 of 72
- Download datasheet (2Mb)
3.2.6
4711B–4BMCU–01/05
Bi-directional Port 6
Figure 3-5.
This 2-bit bi-directional port can be used as a bit wise programmable I/O. The data is LSB
aligned so that the two MSB's will not appear on the port pins when written. The port pins can
also be used as external interrupt inputs (see
rupts can be masked or independently configured to trigger on either edge. The interrupt priority
levels are also configurable. The interrupt configuration and port direction is controlled by the
Port 6 Control Register (P6CR). An additional low resistance pull-up transistor (flash option) pro-
vides an internal bus pull-up for serial bus applications.
In output mode (PxDDR bit = 0), the respective Port Data Register (PxDAT) bit appears on the
port pin, driven by an output port driver stage which can be mask programmed as open drain, or
full complementary CMOS. With an IN instruction the actual pin state can be read back into the
controller at any time without changing the port directional mode. If the output port is flash con-
figured as an open drain driver, the controller is able to receive the external data on this pin
without switching into input mode as long as the output transistor is switched off.
In input mode (PxDDR bit = 1), the output driver stage is deactivated, so that an IN instruction
will directly read the pin state which can be driven from an external source. In this case, the state
of the Port Data Register (PxDAT), although not appearing at the pin itself, remains unchanged.
High resistance mask selectable pull-up or pull-down transistors are automatically switched onto
the port pin in input mode. The Port Data Register is written to the respective port address with
an OUT instruction.
The Port 6 Data Register (P6DAT) is I/O mapped to the primary address register of address
'6'hex and the Port 6 Control Register (P6CR) to the corresponding auxiliary register. The P6CR
is a byte wide register and is written by writing the low nibble first and then the high nibble (see
section “Addressing peripherals”).
I/O Bus
I/O Bus
Master reset
IN enable
Bi-directional Port 6
(Data out)
P6DATy
D
S
Q
(1)
Flash options
Figure 3-5
V
DD
(1)
(1)
and
Figure 3-6 on page
V
DD
Pull-up
(1)
(1)
Pull-down
V
DD
V
DD
(1)
(1)
y = 0 or 1
Strong
Static
Pull-up
4k at 5 V
BP6y
Strong
Static
Pull-down
4k at 5 V
ATAM510
31). Both inter-
29
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