ade7566 Analog Devices, Inc., ade7566 Datasheet - Page 58

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ade7566

Manufacturer Part Number
ade7566
Description
Single-phase Energy Measurement Ic With 8052 Mcu, Rtc, And Lcd Driver
Manufacturer
Analog Devices, Inc.
Datasheet

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ADE7566/ADE7569
Integration Time Under Steady Load
As mentioned in the Active Energy Calculation section, the
discrete time sample period (T) for the accumulation register is
1.22 μs (5/ MCLK). With full-scale sinusoidal signals on the
analog inputs and the VARGAIN and VARDIV registers set to
0x000, the integration time before the reactive energy register
overflows is calculated in Equation 23.
When VARDIV is set to a value different from 0, the integration
time varies, as shown in Equation 24.
Reactive Energy Accumulation Modes
VAR Signed Accumulation Mode
The ADE7569 reactive energy default accumulation mode is a
signed accumulation based on the reactive power information.
VAR Antitamper Accumulation Mode
The ADE7569 is placed in VAR antitamper accumulation mode
by setting the SAVARM bit in the ACCMODE register (0x0F). In
this mode, the reactive power is accumulated depending on the
sign of the active power. When active power is positive, the
reactive power is added as it is to the reactive energy register.
When active power is negative, the reactive power is subtracted
from the reactive energy accumulator (see Figure 67). The CF
pulse also reflects this accumulation method when in this mode.
The default setting for this mode is off. Transitions in the direction
of power flow and no-load threshold are active in this mode.
Time =
Time
0xFFFF,
0xCCCCD
=
Time
FFFF,
WDIV
FFFF
= 0
×
×
VARDIV
. 1
22
μ
s
=
409
6 .
sec
=
. 6
82
min
Rev. 0 | Page 58 of 136
(23)
(24)
REACTIVE ENERGY
REACTIVE POWER
ACTIVE POWER
APSIGN FLAG
THRESHOLD
THRESHOLD
THRESHOLD
THRESHOLD
NO-LOAD
NO-LOAD
NO-LOAD
NO-LOAD
Figure 67. Reactive Energy Accumulation in
Antitamper Accumulation Mode
INTERRUPT STATUS REGISTERS
POS
NEG
POS

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