adsp-21462w Analog Devices, Inc., adsp-21462w Datasheet - Page 17

• Manufacturer Part Number: adsp-21462w
• Description: Sharc Processor
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
DATA MODES
The address and data pins of the external memory interface are muxed (using bits in the SYSCTL register) to support the external memory
interface data (input/output), the PDAP (input only), and the FLAGS (input/output).
Table 7. Function of Data Pins
BOOT MODES
Table 8. Boot Mode Selection
CORE INSTRUCTION RATE TO CLKIN RATIO MODES
For details on processor timing, see
Table 9. Core Instruction Rate/ CLKIN Ratio Selection
DATA PIN MODE
000
001
010
011
100
101
110
111
BOOTCFG2–0
000
001
010
011
100
101
CLKCFG1–0
00
01
11
10
Booting Mode
SPI Slave Boot
SPI Master Boot
AMI user boot (for 8-bit Flash boot)
Reserved
Link Port 0 Boot
Reserved
Core to CLKIN Ratio
6:1
32:1
Reserved
16:1
Timing Specifications
FLAGS/PWM [15–0]
AMI_ADDR [23:8]
Rev. PrA | Page 17 of 60 | November 2008
PDAP (DATA + CTRL)
AMI_ADDR [23:0]
and
Figure 3 on Page
Three-state all pins
Reserved
Reserved
Reserved
Reserved
AMI_ADDR [7:0]
21.
Table 7
provides the pin settings.
FLAGS [15–0]
ADSP-21462W/ADSP-
AMI_DATA [7:0]
AMI_DATA [7:0]
FLAGS [7–0]