dac1008d650 NXP Semiconductors, dac1008d650 Datasheet - Page 50
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dac1008d650
Manufacturer Part Number
dac1008d650
Description
Dac1008d650 Dual 10-bit Dac; Up To 650 Msps; 2?, 4? Or 8? Interpolating With Jesd204a Interface
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1008D650.pdf
(98 pages)
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NXP Semiconductors
Table 57.
Default settings are shown highlighted.
Table 58.
Default settings are shown highlighted.
DAC1008D650
Product data sheet
Bit
3
2
1
0
Bit
2 to 0
Symbol
JD_ODD
MDS_PRERUN
MDS_LOCKOUT
MDS_LOCK
Symbol
PAGE[2:0]
MDS_STATUS1 register (address 0Ah) bit description
PAGE_ADDRESS register (address 1Fh) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 17 December 2010
Access
R
R
R
R
Access
R/W
Value
0
1
0
1
0
1
0
1
Value
0h
2×, 4× or 8× interpolating DAC with JESD204A
Description
MDS start mode
MDS pre-run phase active flag
MDS lockout detected flag
MDS lock flag
Description
page address
MDS start aligned to cdi-even sample
MDS start aligned to cdi-odd sample (only for ^2)
false
true
false
true
false
true
DAC1008D650
© NXP B.V. 2010. All rights reserved.
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