adv7152 Analog Devices, Inc., adv7152 Datasheet - Page 15

• Manufacturer Part Number: adv7152
• Description: Cmos 220 Mhz True-color Graphics Triple 10-bit Video Ram-dac
• Manufacturer: Analog Devices, Inc.

MICROPROCESSOR (MPU) PORT
The ADV7152 supports a standard MPU Interface. All the
functions of the part are controlled via this MPU port. Direct
access is gained to the Address Register, Mode Register and all
the Control Registers as well as the Color Palette. The follow-
ing sections describe the setup for reading and writing to all of
the devices registers.
MPU Interface
The MPU interface (Figure 25) consists of a bidirectional,
10-bit wide databus and interface control signals CE, C0, C1
and R/W. The 10-bit wide databus is user configurable as
illustrated.
REV. B
Figure 24. 15-Bit True-Color Mapping Using R0–R7
and G0–G6
PIXEL
INPUT
DATA
R4
R0
G4
G3
G2
B3
R3
R2
R1
G1
G0
B4
B2
B1
B0
x
x
x
x
x
x
x
x
x
ASSIGN-
MENTS
PIN
R6
R5
R4
R3
R2
R1
R0
G6
G5
G4
G3
G2
G1
G0
B6
B5
B4
B3
B2
B1
B0
R7
G7
B7
LATCHED
PIXEL
DATA
PORT
R4
G4
G3
G1
G0
B4
B3
TO
R3
R2
R1
R0
G2
B2
B1
B0
x
x
x
x
x
x
x
x
x
REGISTER
ADDRESS
(A7–A0)
ADDR
CE
INTERNALLY
TO 5 LSBS
SHIFTED
DATA
R/W
R4
R3
R2
R1
R0
G4
G3
G2
G1
G0
B4
B3
B2
B1
B0
0
0
0
0
0
0
0
0
0
5
5
5
REGISTER
C0
MODE
(MR1)
Figure 25. MPU Port and Register Configuration
DATA LATCHES
LOCATION "0"
LOCATION "0"
LOCATION "0"
256 x 10 RAM
256 x 10 RAM
(GREEN LUT)
256 x 10 RAM
C1
(BLUE LUT)
LOCATIONS
(RED LUT)
LOCATION "31"
LOCATION "31"
LOCATION "31"
FIRST 32
OF RAM
PIXEL MASK
REGISTERS
REGISTER
REGISTER
TEST
10
10
10
TO
RED
DAC
CONTROL REGISTERS
TO
GREEN
DAC
TO
BLUE
DAC
ID
MPU PORT
D0 – D9
10 (8+2)
REGISTERS
COMMAND
(CR1–CR3)
REGISTER
REVISION
–15–
Databus
Width
10 Bit
10 Bit
8 Bit
8 Bit
Register Mapping
The ADV7152 contains a number of onboard registers includ-
ing the Mode Register (MR17–MR10), Address Register (A7–
A0) and nine Control Registers as well as Red (R9–R0), Green
(G9–G0) and Blue (B9–B0) Color Registers. These registers
control the entire operation of the part. Figure 26 shows the
internal register configuration.
Control lines C1 and C0 determine which register the MPU is
accessing. C1 and C0 also determine whether the Address Reg-
ister is pointing to the color registers and look-up table RAM or
the control registers. If C1, C0 = 1, 0, the MPU has access to
whatever control register is pointed to by the Address Register
(A7–A0). If C1, C0 = 0, 1, the MPU has access to the Look-Up
Table RAM (Color Palette) through the associated color regis-
ters. The CE input latches data to or from the part.
The R/W control input determines between read or write ac-
cesses. The Truth Tables III and IV show all modes of access to
the various registers and color palette for both the 8-bit wide
databus configuration and 10-bit wide databus configuration. It
should be noted that after power-up, the devices MPU port is
automatically set to 10-bit wide operation (see Power-On Reset
section).
Color Palette Accesses
Data is written to the color palette by first writing to the address
register of the color palette location to be modified. The MPU
performs three successive write cycles for each of the red, green
and blue registers (10 bit or 8 bit). An internal pointer moves
from red to green to blue after each write is completed. This
pointer is reset to red after a blue write or whenever the address
register is written. During the blue write cycle, the three bytes of
red, green and blue are concatenated into a single 30-bit/24-bit
word and written to the RAM location as specified in the ad-
dress register (A7–A0). The address register then automatically
increments to point to the next RAM location and a similar red,
green and blue palette write sequence is performed. The address
register resets to 00H following a blue write cycle to color pal-
ette RAM location FFH.
PALETTES
DATA TO
REGISTER
RED
30
Table II. Databus Width Table
COLOR REGISTERS
REGISTER
GREEN
RAM/DAC
Resolution
10 Bit
8 Bit
10 Bit
8 Bit
REGISTER
BLUE
ADV7152
Read/Write
Mode
10-Bit Parallel
8-Bit Parallel
8+2 Byte
8-Bit Parallel