adv7194 Analog Devices, Inc., adv7194 Datasheet - Page 22
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adv7194
Manufacturer Part Number
adv7194
Description
Professional Extended-10? Video Encoder With 54 Mhz Oversampling
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADV7194.pdf
(69 pages)
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ADV7194
Mode 0 (CCIR–656): Slave Option
(Timing Register 0 TR0 = X X X X X 0 0 0)
The ADV7194 is controlled by the SAV (Start Active Video) and EAV (End Active Video) Time Codes in the Pixel Data. All timing
information is transmitted using a 4-byte synchronization pattern. A synchronization pattern is sent immediately before and after
each line during active picture and retrace. Mode 0 is illustrated in Figure 38. The HSYNC, VSYNC and BLANK (if not used) pins
should be tied high during this mode. Blank output is available.
Mode 0 (CCIR–656): Master Option
(Timing Register 0 TR0 = X X X X X 0 0 1)
The ADV7194 generates H, V, and F signals required for the SAV (Start Active Video) and EAV (End Active Video) Time Codes in
the CCIR656 standard. The H bit is output on the HSYNC pin, the V bit is output on the BLANK pin and the F bit is output on
the VSYNC pin. Mode 0 is illustrated in Figure 39 (NTSC) and Figure 40 (PAL). The H, V, and F transitions relative to the video
waveform are illustrated in Figure 41.
H
V
F
H
V
F
522
DISPLAY
260
DISPLAY
NTSC/PAL M SYSTEM
523
261
(525 LlNES/60Hz)
(625 LINES/50Hz)
INPUT PIXELS
524
262
PAL SYSTEM
ANALOG
VIDEO
263
525
264
1
ODD FIELD
Y
END OF ACTIVE
VIDEO LINE
C
r Y
265
EVEN FIELD
2
F
F
4 CLOCK
4 CLOCK
EAV CODE
0
0
266
EVEN FIELD
3
0
0
X
Y
8
0
ODD FIELD
267
4
1
0
8
0
1
0
268
5
VERTICAL BLANK
ANCILLARY DATA
0
0
269
VERTICAL BLANK
6
268 CLOCK
280 CLOCK
F
F
(HANC)
F
F
A
B
270
7
A
B
A
B
271
8
8
0
1
0
272
9
8
0
1
0
SAV CODE
4 CLOCK
F
F
4 CLOCK
START OF ACTIVE
273
10
0
0
VIDEO LINE
0
0
X
Y
274
11
C
b Y
1440 CLOCK
1440 CLOCK
C
r
Y
C
b
Y
283
20
C
r
Y
C
b
284
21
DISPLAY
DISPLAY
285
22