pca9632 NXP Semiconductors, pca9632 Datasheet - Page 9

• Manufacturer Part Number: pca9632
• Description: Pca9632 4-bit Fm I?c-bus Low Power Led Driver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 6.
Legend: * default value.
[1]
[2]
PCA9632_1
Objective data sheet
Bit
7
6
5
4
3
2
1 to 0
See
Change of the outputs at the STOP command allows synchronizing outputs of more than one PCA9632. Applicable to registers from
02h (PWM0) to 08h (LEDOUT) only.
Section 7.6 “Using the PCA9632 with and without external drivers”
Symbol
-
-
DMBLNK
INVRT
OCH
OUTDRV
OUTNE[1:0]
MODE2 - Mode register 2 (address 01h) bit description
[1]
7.3.2 Mode register 2, MODE2
7.3.3 PWM registers 0 to 3, PWMx—Individual brightness control registers
[1]
Access
read only
read only
R/W
R/W
R/W
R/W
R/W
Table 7.
Legend: * default value.
While operating in Individual brightness mode (LDRx = 10), a 1.5625 kHz fixed frequency
signal is used for each output. Duty cycle is controlled through 256 linear steps from 00h
(0 % duty cycle = LED output off) to FFh (99.6 % duty cycle = LED output at maximum
brightness). In this mode, all the 8 bits are used.
E.g., if IDCx[7:0] = 1111 1111, then duty cycle = 255 / 256 = 99.6 %.
While operating in Group dim mode, a 6.25 kHz fixed frequency signal is used for each
output. Duty cycle is controlled through 64 linear steps from 00h (0 % duty cycle = LED
output off) to 3Fh (98.4 % duty cycle = LED output at maximum brightness). In this mode
only the 6 MSBs are used (IDCx[7:2]). The 2 LSBs IDCx[1:0] are ignored. Applicable to
LED outputs programmed with LDRx = 11 (LEDOUT register).
E.g., if IDCx[7:2] = 111111, then duty cycle = 1111 1100 / 256 = 252 / 256 = 98.4 %.
duty cycle
duty cycle
Address
02h
03h
04h
05h
Register
PWM0
PWM1
PWM2
PWM3
PWM0 to PWM3 - PWM registers 0 to 3 (address 02h to 05h) bit description
Value
0*
0*
0*
1
0*
1
0*
1
0*
1
01*
=
=
-------------------------- -
-----------------------------------
IDCx 7:0
IDCx 7:2 ,00
256
256
Description
reserved
reserved
Group control = dimming
Group control = blinking
Output logic state not inverted. Value to use when no external driver used.
Output logic state inverted. Value to use when external driver used.
Outputs change on STOP command.
Outputs change on ACK.
The 4 LED outputs are configured with an open-drain structure.
The 4 LED outputs are configured with a totem-pole structure.
unused
Rev. 01 — 28 September 2007
Bit
7:0
7:0
7:0
7:0
Symbol
IDC0[7:0]
IDC1[7:0]
IDC2[7:0]
IDC3[7:0]
for more details.
Access Value
R/W
R/W
R/W
R/W
4-bit Fm+ I
0000 0000* PWM0 Individual Duty Cycle
0000 0000* PWM1 Individual Duty Cycle
0000 0000* PWM2 Individual Duty Cycle
0000 0000* PWM3 Individual Duty Cycle
[2]
2
C-bus low power LED driver
Description
PCA9632
© NXP B.V. 2007. All rights reserved.
9 of 32
(1)
(2)