pca9632 NXP Semiconductors, pca9632 Datasheet - Page 2

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pca9632

Manufacturer Part Number
pca9632
Description
Pca9632 4-bit Fm I?c-bus Low Power Led Driver
Manufacturer
NXP Semiconductors
Datasheet

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2. Features
PCA9632_1
Objective data sheet
The Software Reset (SWRST) Call allows the master to perform a reset of the PCA9632
through the I
their default state causing the outputs to be set high-impedance. This allows an easy and
quick way to reconfigure all device registers to the same condition.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
40 power reduction compared to PCA9633
4 LED drivers. Each output programmable at:
1 MHz Fast-mode Plus I
output for driving high capacitive buses
256-step (8-bit) linear programmable brightness per LED output varying from fully off
(default) to maximum brightness using a 1.5625 kHz PWM signal in individual
brightness mode
64-step (6-bit) linear programmable brightness for each LED output varying from fully
off (default) to maximum brightness using a 6.25 kHz PWM signal in Group dim mode
In group dim mode 16-step group brightness control allows global dimming (using a
190 Hz PWM signal) from fully off to maximum brightness (default)
256-step (8-bit) linear programmable brightness per LED output varying from fully off
(default) to maximum brightness using a 1.5625 kHz PWM signal in group blink mode
64-step group blinking with frequency programmable from 24 Hz to 6 Hz and
duty cycle from 0 % to 98.4 %
256-step group blinking with frequency programmable from 6 Hz to 0.09 Hz (10.73 s)
and duty cycle from 0 % to 99.6 %
Four totem-pole outputs (sink 25 mA and source 10 mA at 5 V) with software
programmable open-drain LED outputs selection (default at high-impedance). No input
function.
Output state change programmable on the Acknowledge or the STOP Command to
update outputs byte-by-byte or all at the same time (default to ‘Change on STOP’).
Software Reset feature (SWRST Call) allows the device to be reset through the
I
400 kHz internal oscillator requires no external components
Internal power-on reset
Noise filter on SDA/SCL inputs
Edge rate control on outputs
No glitch on power-up
Supports hot insertion
Low standby current of < 1 A
Operating power supply voltage range of 2.3 V to 5.5 V
5.5 V tolerant inputs
ESD protection exceeds 5000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
2
N
N
N
N
40 C to +85 C operation
C-bus
Off
On
Programmable LED brightness
Programmable group dimming/blinking mixed with individual LED brightness
2
C-bus, identical to the Power-On Reset (POR) that initializes the registers to
Rev. 01 — 28 September 2007
2
C-bus interface with 30 mA high drive capability on SDA
4-bit Fm+ I
2
C-bus low power LED driver
PCA9632
© NXP B.V. 2007. All rights reserved.
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