adc12dl066civs National Semiconductor Corporation, adc12dl066civs Datasheet - Page 22

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adc12dl066civs

Manufacturer Part Number
adc12dl066civs
Description
Dual 12-bit, 66 Msps, 450 Mhz Input Bandwidth A/d Converter W/internal Reference
Manufacturer
National Semiconductor Corporation
Datasheet

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Applications Information
If the amplifier exhibits overshoot, ringing, or any evidence of
instability, even at a very low level, it will degrade perfor-
mance. A small series resistor at each amplifier output and a
capacitor at the analog inputs (as shown in Figure 3 and
Figure 5) will improve performance. The LMH6702 and the
LMH6628 have been successfully used to drive the analog
inputs of the ADC12DL066.
Also, it is important that the signals at the two inputs have
exactly the same amplitude and be exactly 180
with each other. Board layout, especially equality of the
length of the two traces to the input pins, will affect the
effective phase between these two signals. Remember that
an operational amplifier operated in the non-inverting con-
figuration will exhibit more time delay than will the same
device operating in the inverting configuration.
Operating with the reference pins outside of the speci-
fied range. As mentioned in Section 1.2, V
the range of
REF
(Continued)
o
out of phase
should be in
22
Operating outside of these limits could lead to performance
degradation.
Inadequate network on Reference Bypass pins (V
V
Section 1.2, these pins should be bypassed with 0.1 µF
capacitors to ground at V
RC of 1.5 Ω and 1.0 µF between pins V
between V
Using a clock source with excessive jitter, using exces-
sively long clock signal trace, or having other signals
coupled to the clock signal trace. This will cause the
sampling interval to vary, causing excessive output noise
and a reduction in SNR and SINAD performance.
RN
A, V
RM
RP
A, V
B and V
RP
B, V
0.8V ≤ V
RN
RN
B for best performance.
RM
B and V
A and V
REF
≤ 1.5V
RM
RM
B). As mentioned in
B and with a series
RP
A and V
RN
A and
RP
A,

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