adc12dl066civs National Semiconductor Corporation, adc12dl066civs Datasheet - Page 16

• Manufacturer Part Number: adc12dl066civs
• Description: Dual 12-bit, 66 Msps, 450 Mhz Input Bandwidth A/d Converter W/internal Reference
• Manufacturer: National Semiconductor Corporation

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Functional Description
Operating on a single +3.3V supply, the ADC12DL066 uses
a pipeline architecture and has error correction circuitry to
help ensure maximum performance. The differential analog
input signal is digitized to 12 bits. The user has the choice of
using an internal 1.0 Volt stable reference or using an exter-
nal reference. Any external reference is buffered on-chip to
ease the task of driving that pin.
The output word rate is the same as the clock frequency,
which can be between 15 Msps (typical) and 66 Msps with
fully specified performance at 66 Msps. The analog input
voltage for both channels is acquired at the rising edge of the
clock and the digital data for a given sample is delayed by
the pipeline for 6 clock cycles. A choice of Offset Binary or
Two’s Complement output format is selected with the OF pin.
A logic high on the power down (PD) pin reduces the con-
verter power consumption to 75 mW.
Applications Information
1.0 OPERATING CONDITIONS
We recommend that the following conditions be observed for
operation of the ADC12DL066:
1.1 Analog Inputs
The ADC12DL066 has two analog signal input pairs, V
and V
other converter. Each pair of pins forms a differential input
pair. There is one reference input pin, V
optional external reference.
The analog input circuitry contains an input boost circuit that
provides improved linearity over a wide range of analog input
voltages. To prevent an on-chip over voltage condition that
could impair device reliability, the input signal should never
exceed the voltage described as
1.2 Reference Pins
The ADC12DL066 is designed to operate with a 1.0V refer-
ence, but performs well with reference voltages in the range
of 0.8V to 1.5V. Lower reference voltages will decrease the
signal-to-noise ratio (SNR) of the ADC12DL066. Increasing
the reference voltage (and the input signal swing) beyond
1.5V may degrade THD and SFDR for a full-scale input,
especially at higher input frequencies.
It is important that all grounds associated with the reference
voltage and the analog input signal make connection to the
ground plane at a single, quiet point to minimize the effects
of noise currents in the ground path.
The ADC12DL066 will perform well with reference voltages
up to 1.5V for full-scale input frequencies up to 10 MHz.
However, more headroom is needed as the input frequency
increases, so the maximum reference voltage (and input
swing) will decrease for higher full-scale input frequencies.
The six Reference Bypass Pins (V
V
The V
RM
3.0V ≤ V
V
2.4V ≤ V
15 MHz ≤ f
0.8V ≤ V
V
D
REF
B and V
= V
IN
RM
/2 ≤ V
A- for one converter and V
A
A and V
A
DR
REF
RN
≤ 3.6V
CM
CLK
≤ V
B) are made available for bypass purposes.
≤ 1.5V
≤ 1.2V
≤ 66 MHz
D
RM
Peak V
B pins should each be bypassed to
IN
≤ V
A
− 1.0V.
RP
IN
A, V
B+ and V
REF
RM
A, V
, for use of an
IN
RN
B- for the
A, V
IN
RP
A+
B,
16
ground with a 0.1 µF capacitor. A series 1.5Ω resistor (5%)
and 1.0 µF capacitor (
V
as shown in Figure 4. This configuration is necessary to
avoid reference oscillation, which could result in reduced
SFDR and/or SNR.
Smaller capacitor values than those specified will allow
faster recovery from the power down mode, but may result in
degraded noise performance. DO NOT LOAD these pins.
Loading any of these pins may result in performance degra-
dation. The ADC12DL066 does not have a reference output
pin.
The nominal voltages for the reference bypass pins are as
follows:
The V
sources for the analog input pins as long as no d.c. current is
drawn from them. However, because the voltages at the V
pins are half that of the V
common mode voltage sources will result in reduced input
headroom (the difference between the V
and the peak signal voltage at either analog input) and the
possibility of reduced THD and SFDR performance. For this
reason, it is recommended that V
least 2 Volts when using the V
high input frequencies it may be necessary to further in-
crease this headroom to maintain THD and SFDR perfor-
mance.
User choice of an on-chip or external reference voltage is
provided. The internal 1.0 Volt reference is in use when the
the INT/EXT REF pin is at a logic low, regardless of any
voltage applied to the V
is at a logic high, the voltage at the V
voltage reference. Optimum ADC dynamic performance is
obtained when the reference voltage is in the range of 0.8V
to 1.5V. When an external reference is used, the V
should be bypassed to ground with a 0.1 µF capacitor close
to the reference input pin. There is no need to bypass the
V
There is no direct access to the internal reference voltage.
However the nominal value of the reference voltage,
whether the internal or an external reference is used, is
approximately equal to V
1.3 Signal Inputs
The signal inputs are V
V
defined as
for the "A" converter and
for the "B" converter. Figure 2 shows the expected input
signal range. Note that the common mode input voltage,
V
value of 1.0V.
The ADC12DL066 performs best with a differential input
signal with each input centered around a common mode
voltage, V
log input pin should not exceed the value of the reference
voltage or the output data will be clipped.
The two input signals should be exactly 180˚ out of phase
from each other and of the same amplitude. For single
RP
REF
IN
CM
V
V
V
B+ and V
RM
RP
RN
A and V
, should be in the range of 0.5V to 1.5V with a nominal
pin when the internal reference is used.
RN
A = V
A = V
A = V
pins may be used as common mode voltage (V
CM
RN
RP
RN
RM
IN
. The peak-to-peak voltage swing at each ana-
A pins and between the V
B = V
B− for the other ADC. The input signal, V
B = V
B = V
V
V
IN
IN
RM
RM
A
A = (V
B = (V
±
/ 2
+ V
REF
20%) should be placed between the
− V
IN
RP
A
A+ and V
IN
REF
IN
REF
pin. When the INT/EXT REF pin
supply pin, using these pins for
− V
A+) – (V
B+) – (V
RM
/ 2
/ 2
RN
A
always exceed V
pins as V
.
IN
REF
IN
IN
A− for one ADC and
A−)
B−)
RP
pin is used for the
B and V
A
CM
supply voltage
sources. For
RN
REF
REF
B pins,
by at
IN
CM
pin
, is
RM
)