adc12dl066civs National Semiconductor Corporation, adc12dl066civs Datasheet - Page 17

• Manufacturer Part Number: adc12dl066civs
• Description: Dual 12-bit, 66 Msps, 450 Mhz Input Bandwidth A/d Converter W/internal Reference
• Manufacturer: National Semiconductor Corporation

Applications Information
frequency inputs, angular errors result in a reduction of the
effective full scale input. For complex waveforms, however,
angular errors will result in distortion.
For single frequency sine waves with angular errors of less
than 45˚ (π/4) between the two inputs, the full scale error in
LSB can be described as approximately
Where dev is the angular difference between the two signals
having a 180˚ relative phase relationship to each other (see
Figure 3). Drive the analog inputs with a source impedance
less than 100Ω.
1.3.1 Single-Ended Operation
Single-ended performance is inferior to performance ob-
tained when differential input signals are used. For this
reason, single-ended operation is not recommended. How-
ever, if single ended-operation is required and the resulting
performance degradation is acceptable, one of the analog
inputs should be connected to the d.c. mid point voltage of
the driven input. The peak-to-peak differential input signal at
the driven input pin should be twice the reference voltage to
maximize SNR and SINAD performance (Figure 2b). For
example, set V
with a signal range of 0.5V to 1.5V.
Because very large input signal swings can degrade distor-
tion performance, better performance with a single-ended
input can be obtained by reducing the reference voltage
when maintaining a full-range output. Table 1 and Table 2
indicate the input to output relationship of the ADC12DL066.
Note again that single-ended operation of the ADC12D040 is
not recommended because of the degraded performance
that results. A single-ended to differential conversion circuit
is shown in Figure 5.
E
FIGURE 3. Angular Errors Between the Two Input
FS
Signals Will Reduce the Output Level or Cause
= 2
FIGURE 2. Expected Input Signal Range
(n-1)
* ( 1 - cos (dev) ) = 2048 * ( 1 - cos (dev) )
REF
to 0.5V, bias V
Distortion
IN
− to 1.0V and drive V
20055212
20055211
(Continued)
IN
+
17
1.3.2 Driving the Analog Inputs
The V
an analog switch followed by a switched-capacitor amplifier.
The capacitance seen at the analog input pins changes with
the clock level, appearing as 8 pF when the clock is low, and
7 pF when the clock is high.
As the internal sampling switch opens and closes, current
pulses occur at the analog input pins, resulting in voltage
spikes at these pins. As a driving amplifier attempts to coun-
teract these voltage spikes, a damped oscillation may ap-
pear at the ADC analog inputs. Do not attempt to filter out
these
ADC12DL066 input pins that are able to react to these
pulses and settle before the switch opens and another
sample is taken. The LMH6550, LMH6702, LMH6628,
LMH6622 and the LMH6655 are good amplifiers for driving
the ADC12DL066.
To help isolate the pulses at the ADC input from the amplifier
output, use RCs at the inputs, as can be seen in Figure 4
and Figure 5. These components should be placed close to
the ADC inputs because the input pins of the ADC is the
most sensitive part of the system and this is the last oppor-
tunity to filter that input.
For Nyquist applications the RC pole should be at the ADC
sample rate. The ADC input capacitance in the sample mode
should be considered when setting the RC pole. Setting the
pole in this manner will provide best SNR performance.
To obtain best SINAD and ENOB performance, reduce the
RC time constant until SNR and THD are numerically equal
to each other. To obtain best distortion and SFDR perfor-
mance, eliminate the RC altogether.
TABLE 2. Input to Output Relationship – Single-Ended
TABLE 1. Input to Output Relationship – Differential
V
V
V
V
V
V
V
V
V
V
V
V
V
V
REF
REF
REF
REF
REF
V
V
V
V
V
V
REF / 4
CM
CM
CM
CM
CM
CM
CM
CM
REF
REF
IN +
CM
IN +
CM
IN
/ 2
/ 4
/ 2
/ 2
/ 2
+ and the V
−
−
+
+
−
−
+
+
pulses.
V
V
V
V
V
V
V
V
REF
REF
REF
V
V
V
V
V
V
V
V
REF / 2
CM
CM
CM
CM
CM
CM
CM
CM
CM
CM
IN −
IN −
Rather,
/ 4
/ 4
/ 2
+
+
−
−
IN
− inputs of the ADC12DL066 consist of
0000 0000 0000
0100 0000 0000
1000 0000 0000
0000 0000 0000
0100 0000 0000
1000 0000 0000
1100 0000 0000
1100 0000 0000
Binary Output
1111 1111 1111
Binary Output
1111 1111 1111
use
Input
Input
amplifiers
2’s Complement
2’s Complement
1000 0000 0000
1100 0000 0000
0000 0000 0000
0100 0000 0000
1000 0000 0000
1100 0000 0000
0000 0000 0000
0100 0000 0000
0111 1111 1111
0111 1111 1111
to
Output
Output
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drive
the