m48t12 STMicroelectronics, m48t12 Datasheet
m48t12
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m48t12 Summary of contents
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... WRITE protect voltages (V = Power-fail deselect voltage): PFD – M48T02 4.75 to 5.5V CC 4.5V ≤ V ≤ 4.75V PFD – M48T12 4.5 to 5.5V CC 4.2V ≤ V ≤ 4.5V PFD ■ Self-contained battery and crystal in the CAPHAT™ DIP package ■ Pin and function compatible with JEDEC standard 2K x8 SRAMs ■ ...
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Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Signal names A0-A10 DQ0-DQ7 ® RAM is a 2Kb x 8 non-volatile static RAM and real time A0-A10 W M48T02 M48T12 Address Inputs Data Inputs / Outputs Chip Enable Output Enable WRITE Enable Supply Voltage Ground DQ0-DQ7 AI01027 5/24 ...
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... LITHIUM CELL VOLTAGE SENSE SWITCHING 6/ M48T02 19 A10 M48T12 DQ7 DQ0 9 16 DQ6 DQ1 10 15 DQ5 DQ2 11 14 DQ4 DQ3 AI01028 POWER V PFD AND BOK CIRCUITRY ...
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Operation modes As Figure 3 on page 6 oscillator of the M48T02/12 are integrated on one silicon chip. The two circuits are interconnected at the upper eight memory locations to provide user accessible BYTEWIDE™ clock information in the bytes ...
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... Min Max 70° 4.75 to 5.5V or 4.5 to 5.5V (except where noted AVQV tAXQX tEHQZ tGHQZ VALID AI01330 M48T02/M48T12 –150 –200 Min Max Min Max 150 200 70 150 200 70 150 200 ...
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Write mode The M48T02/ the WRITE Mode whenever W and E are active. The start of a WRITE is referenced from the latter occurring falling edge WRITE is terminated by the earlier ...
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... V = 4.75 to 5.5V or 4.5 to 5.5V (except where A CC falls within the V (max PFD to the RAM and disconnects the battery rises, the battery voltage is checked. If the voltage is too SO CC M48T02/M48T12 –150 –200 Unit 150 200 120 ...
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Figure 7. Checking the BOK flag status AT ANY ADDRESS COMPLEMENT BACK TO SAME ADDRESS ADDRESS AGAIN (BATTERY OK) WRITE ORIGINAL SAME ADDRESS POWER-UP READ DATA WRITE DATA READ DATA AT SAME IS DATA NO (BATTERY LOW) COMPLEMENT OF FIRST ...
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Clock operations 3.1 Reading the clock Updates to the TIMEKEEPER prevent reading data in transition. The BiPORT™ TIMEKEEPER cells in the RAM array are only data registers and not the actual clock counters, so updating the registers can be ...
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... The STOP Bit is the MSB of the seconds register. Setting '1' stops the oscillator. The M48T02/12 is shipped from STMicroelectronics with the STOP Bit set to a '1.' When reset to a '0,' the M48T02/12 oscillator starts within one second. ...
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Calibration occurs within a 64 minute cycle. The first 62 minutes in the cycle may, once per minute, have one second either shortened by 128 or lengthened by 256 oscillator cycles. If ...
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Figure 8. Crystal accuracy across temperature ppm 20 0 -20 -40 -60 -80 -100 0 5 Figure 9. Clock calibration NORMAL POSITIVE CALIBRATION NEGATIVE CALIBRATION 3.5 V noise and negative going transients CC I transients, including those produced by output ...
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V 1N5817 is recommended for through hole and MBRS120T3 is recommended for surface mount. Figure 10. Supply voltage protection 16/ (cathode connected 0.1μ anode ...
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... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 6. ...
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... Effective capacitance measured with power supply at 5V. Sampled only, not 100% tested 25° 1MHz. 3. Outputs deselected. 18/24 M48T02 ) 4. 100 L ≤ 1.5 DEVICE UNDER TEST 1kΩ includes JIG capacitance (1)(2) Parameter M48T12 Unit 4 100 ≤ 1.5 5V 1.8kΩ OUT 100pF AI01019 Min Max ° ...
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Table 9. DC characteristics Symbol Parameter I Input Leakage Current LI (2) I Output Leakage Current LO I Supply Current CC (3) I Supply Current (Standby) TTL CC1 (3) I Supply Current (Standby) CMOS CC2 V Input Low Voltage IL ...
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... PFD CC before Power 70° (min) fall time of less than tF may result in deselection/write protection not occurring passes V (min). PFD may cause corruption of RAM data. FB (1)(2) Parameter M48T02 M48T12 . 70° Min Max 0 300 4.75 to 5.5V or 4.5 to 5.5V (except where CC ...
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Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner ...
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Part numbering Table 13. Ordering information scheme Example: Device type M48T Supply voltage and write protect voltage 4.75 to 5.5V 4.5 to 5.5V Speed –70 = 100ns ...
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Revision history Table 14. Document revision history Date Revision Jul-2000 1.0 13-Jul-2000 1.1 07-May-2001 2.0 14-May-01 2.1 16-Jul-2001 2.2 20-May-2002 2.3 26-Jun-2002 2.4 28-Mar-2003 3.0 31-Mar-2004 4.0 12-Dec-2005 5.0 21-Sep-2007 First issue t change (Table 10) rec Reformatted; temp. ...
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... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...