pcf2123 NXP Semiconductors, pcf2123 Datasheet - Page 12

• Manufacturer Part Number: pcf2123
• Description: Spi Real Time Clock/calendar
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCF2123_1
Product data sheet
9.5 Reset
The oscillator may be stopped, for example, by grounding one of the oscillator pins, OSCI
or OSCO. The oscillator is also considered to be stopped during the time between
power-on and stable crystal resonance. This time may be in the range of 200 ms to 2 s
depending on crystal type, temperature and supply voltage. At power-on the OS flag is
always set.
A reset is automatically generated at power-on. A reset can also be initiated with the
software reset command. It is generally recommended to make a software reset after
power-on.
A software reset can be initiated by setting the bits 6, 4 and 3 in register Control_1 to
logic 1 and all other bits to logic 0 by sending the bit sequence 01011000 (58h), see
Figure
to protect the device from accidently being reset. When sending the software instruction,
the other bits are not written.
The SPI-bus is reset whenever the chip enable pin CE is inactive.
Fig 9.
Fig 10. Software reset command
oscillation
OS flag
V
(1) When CE is inactive, the interface is reset.
reset signal
DD
10. If this bit sequence is not correct, the software reset instruction will be ignored
internal
OS flag
SCL
CE
R/W
OS = 1 and flag can not be cleared
b7
0
b6
0
Rev. 01 — 19 November 2008
b5
0
b4
1
b3
0
addr 00
b2
0
b1
HEX
0
b0
0
oscillation now stable
b7
0
b6
OS = 1 and flag can be cleared
1
OS flag cleared
software reset 58
by software
b5
0
b4
1
SPI Real time clock/calendar
b3
1
b2
HEX
0
b1
0
PCF2123
b0
© NXP B.V. 2008. All rights reserved.
0
OS flag set when
oscillation stops
001aai562
(1)
001aai553
12 of 54
t