ics9lprs365 Integrated Device Technology, ics9lprs365 Datasheet - Page 22

• Manufacturer Part Number: ics9lprs365
• Description: 64-pin Ck505 W/fully Integrated Voltage Regulator + Integrated Series Resistor
• Manufacturer: Integrated Device Technology

1218—09/01/10
Byte 8 Device ID and Output Enable Register
Byte 9 Output Control Register
Byte 10 Free-Running Control Register
Byte 11 Strength Control Register
Bit
Bit
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Pin
Pin
Pin
Pin
27_Selec Latch read
CPU 2 Stop Enable
CPU 1 Stop Enable
CPU 0 Stop Enable
Test Mode Select
PCIF5 STOP EN
Test Mode Entry
CPU1_AMT_EN
TME_Readback
REF Strength
Device_ID3
Device_ID2
Device_ID1
Device_ID0
IO_VOUT2
IO_VOUT1
IO_VOUT0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
SE1_OE
SE2_OE
48MHz
PCIF5
Name
Name
Name
Name
back
PCI4
PCI3
PCI2
PCI1
PCI0
Allows entry into test mode, ignores FSB/TestMode
differentiating between CK505 package options,
IO Output Voltage Select (Least Significant Bit)
IO Output Voltage Select (Most Significant Bit)
Allows test select, ignores REF/FSC/TestSel
Table of Device identifier codes, used for
Enables control of CPU 0 with CPU_STOP#
Enables control of CPU2 with CPU_STOP#
Enables control of CPU1 with CPU_STOP#
Truested Mode Enable (TME) strap status
Allows control of PCIF5 with assertion of
Sets the REF output drive strength
Readback of 27_Select latch
IO Output Voltage Select
Output enable for SE1
Output enable for SE2
M1 mode clk enable
PCI_STOP#
Description
Description
Description
Description
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
etc.
22
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
Normal operation
normal operation
Dot96/ LCD_SS
Free Running
Free Running
Free Running
Outputs HI-Z
Free running
1X (2Loads)
Disabled
Disabled
See Table 3: V_IO Selection
Disable
/SE
1x
1x
1x
1x
1x
1x
1x
0
0
0
0
See Device ID Table
-
-
-
-
-
-
(Default is 0.8V)
ICS9LPRS365
Outputs = REF/N
no overclocking
SRC0/ 27MHz
2X (3 Loads)
PCI_STOP#
Test mode
Stops with
Stoppable
Stoppable
Stoppable
assertion
Enabled
Enabled
Enable
Datasheet
2x
2x
2x
2x
2x
2x
2x
1
1
1
1
-
-
-
-
-
-
27_Select
27_Select
27_Select
power on
power on
Default
Default
Default
Default
latch
latch
latch
1
1
0
1
0
0
0
0
1
0
0
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0