ics8624 Integrated Device Technology, ics8624 Datasheet - Page 9

• Manufacturer Part Number: ics8624
• Description: Differential-input Hstl-output 1 5 700-mhz Clock Zero-delay Buffer
• Manufacturer: Integrated Device Technology

L
The schematic of the ICS8624 layout example is shown in
Figure 4A. The ICS8624 recommended PCB board layout for
this example is shown in Figure 4B. This layout example is
used as a general guideline. The layout in the actual system
8624BY
AYOUT
VDD
RU2
SP
RD2
1K
3.3V
3.3V PECL Driver
G
RU3
1K
RD3
SP
UIDELINE
RU4
1K
RD4
SP
Zo = 50 Ohm
Zo = 50 Ohm
Integrated
Circuit
Systems, Inc.
(155.5 MHz)
RU5
SP
RD5
1K
CLK_SEL
PLL_SEL
SEL0
SEL1
SP = Space (i.e. not intstalled)
F
R8
50
IGURE
R10
50
VDD=3.3V
VDDO=1.8V
DIV_SEL[1:0] = 01
R9
50
SEL0
SEL1
CLK_SEL
4A. ICS8624 HSTL Z
VDD
www.icst.com/products/hiperclocks.html
8624
1
2
3
4
5
6
7
8
U1
SEL0
SEL1
CLK0
nCLK0
CLK1
nCLK2
CLK_SEL
MR
R2B
50
VDDA
ERO
D
9
D
0.01u
R2A
50
will depend on the selected component types, the density of
the components, the density of the traces, and the stack up
of the P.C. board.
ELAY
IFFERENTIAL
C11
VDDO
VDDO
nQ3
nQ2
nQ1
Q3
Q2
Q1
VDDO
B
24
23
22
21
20
19
18
17
10u
UFFER
C16
10
R7
155.5 MHz
S
VDD
CHEMATIC
-
TO
Bypass capacitor located near the power pins
(U1-16)
(U1-9)
-HSTL Z
0.1uF
C2
0.1uF
C1
Zo = 50 Ohm
Zo = 50 Ohm
VDD
E
VDDO
XAMPLE
(U1-32)
(U1-17)
0.1uF
ERO
L
C6
OW
0.1uF
C4
R4A
50
D
(U1-24)
S
ICS8624
ELAY
KEW
R4B
50
+
-
REV. C JUNE 15, 2004
0.1uF
C5
(U1-25)
, 1-
B
LVHSTL_input
UFFER
0.1uF
C7
TO
-5