ics8624 Integrated Device Technology, ics8624 Datasheet - Page 7

• Manufacturer Part Number: ics8624
• Description: Differential-input Hstl-output 1 5 700-mhz Clock Zero-delay Buffer
• Manufacturer: Integrated Device Technology

P
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS8624 provides sepa-
rate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required. Figure 1 illustrates how
a 10Ω resistor along with a 10µF and a .01µF bypass
capacitor should be connected to each V
W
Figure 2 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
8624BY
OWER
IRING THE
S
UPPLY
D
Integrated
Circuit
Systems, Inc.
IFFERENTIAL
F
ILTERING
F
T
I
IGURE
NPUT TO
ECHNIQUES
Single Ended Clock Input
2. S
A
DDA
A
PPLICATION
INGLE
www.icst.com/products/hiperclocks.html
DD
CCEPT
pin.
, V
DDA
E
C1
0.1u
, and V
NDED
S
V_REF
INGLE
DD
/2 is
S
DDO
IGNAL
E
7
D
I
NDED
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
and R2/R1 = 0.609.
NFORMATION
IFFERENTIAL
D
1K
R1
1K
R2
RIVING
VDD
L
EVELS
nCLKx
CLKx
D
IFFERENTIAL
F
IGURE
-
TO
1. P
-HSTL Z
V
V
DDA
DD
I
NPUT
OWER
DD
.01µF
.01µF
= 3.3V, V_REF should be 1.25V
S
UPPLY
ERO
L
3.3V
OW
10Ω
10µF
F
D
ILTERING
S
ICS8624
ELAY
KEW
REV. C JUNE 15, 2004
, 1-
B
UFFER
TO
-5