ics8624 Integrated Device Technology, ics8624 Datasheet - Page 12

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ics8624

Manufacturer Part Number
ics8624
Description
Differential-input Hstl-output 1 5 700-mhz Clock Zero-delay Buffer
Manufacturer
Integrated Device Technology
Datasheet

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3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
HSTL output driver circuit and termination are shown in Figure 5.
T
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = (V
Pd_L = (V
Pd_H = (1V/50Ω) * (2V - 1V) = 20mW
Pd_L = (0.4V/50Ω) * (2V - 0.4V) = 12.8mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 32.8mW
8624BY
o calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load.
OL_MAX
OH_MIN
/R
/R
Integrated
Circuit
Systems, Inc.
L
L
) * (V
) * (V
DD_MAX
DD_MAX
- V
- V
OL_MAX
OH_MIN
F
)
)
IGURE
www.icst.com/products/hiperclocks.html
5. HSTL D
RIVER
V
Q1
DDO
12
C
D
IRCUIT AND
IFFERENTIAL
T
ERMINATION
RL
50Ω
-
TO
V
OUT
-HSTL Z
ERO
L
OW
D
S
ICS8624
ELAY
KEW
REV. C JUNE 15, 2004
, 1-
B
UFFER
TO
-5

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