mt46v128m8p-6t Micron Semiconductor Products, mt46v128m8p-6t Datasheet - Page 41

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mt46v128m8p-6t

Manufacturer Part Number
mt46v128m8p-6t
Description
1gb Ddr Sdram Component
Manufacturer
Micron Semiconductor Products
Datasheet

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WRITE
Figure 17:
PDF: 09005aef80a2f898/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 1Gb DDR: Rev. I, Core DDR: Rev. B 12/07 EN
WRITE Command
Note:
The WRITE command is used to initiate a burst write access to an active row as shown in
Figure 17. The value on the BA0, BA1 inputs selects the bank, and the address provided
on inputs A0–Ai
and configuration, see Table 2 on page 2) selects the starting column location.
BA0, BA1
Address
RAS#
CAS#
WE#
EN AP = enable auto precharge; and DIS AP = disable auto precharge.
CK#
CKE
A10
CS#
CK
HIGH
DIS AP
EN AP
Bank
Col
(
Don’t Care
where Ai is the most significant column address bit for a given density
41
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1Gb: x4, x8, x16 DDR SDRAM
©2003 Micron Technology, Inc. All rights reserved.
Commands

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