ds42585 Advanced Micro Devices, ds42585 Datasheet - Page 50
ds42585
Manufacturer Part Number
ds42585
Description
Stacked Multi-chip Package Mcp Flash Memory And Sram
Manufacturer
Advanced Micro Devices
Datasheet
1.DS42585.pdf
(58 pages)
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AC CHARACTERISTICS
SRAM Read Cycle
Note: CE1#s = OE# = V
50
Parameter
t
t
Symbol
CO1
t
HZ1
LZ1
t
t
t
t
t
t
t
t
t
OLZ
BHZ
OHZ
BLZ
RC
AA
OE
BA
OH
, t
, t
, t
CO2
LZ2
HZ2
ddress
ata Out
Description
Read Cycle Time
Address Access Time
Chip Enable to Output
Output Enable Access Time
LB#s, UB#s to Valid Output
Chip Enable (CE1#s Low and CE2s High) to Low-Z Output
UB#, LB# Enable to Low-Z Output
Output Enable to Low-Z Output
Chip disable to High-Z Output
UB#s, LB#s Disable to High-Z Output
Output Disable to High-Z Output
Output Data Hold from Address Change
IL
, CE2s = WE# = V
Previous Data Valid
Figure 28. SRAM Read Cycle—Address Controlled
IH
, UB#s and/or LB#s = V
P R E L I M I N A R Y
t
OH
DS42585
t
AA
t
RC
IL
Min
85
10
10
10
0
5
0
0
Data Valid
Max
85
85
45
85
25
25
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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