ds42585 Advanced Micro Devices, ds42585 Datasheet - Page 27

• Manufacturer Part Number: ds42585
• Description: Stacked Multi-chip Package Mcp Flash Memory And Sram
• Manufacturer: Advanced Micro Devices

Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses
latch on the falling edge of the WE# or CE#f pulse, whichever happens
later.
Notes:
1.
2. All values are in hexadecimal.
3. Except for the read cycle and the fourth cycle of the autoselect
4. Data bits DQ15–DQ8 are don’t care in command sequences,
5. Unless otherwise noted, address bits A20–A11 are don’t cares.
6. No unlock or command cycles required when bank is in read
7. The Reset command is required to return to reading array data
Read (Note 6)
Reset (Note 7)
Enter SecSi Sector Region
Exit SecSi Sector Region
Program
Unlock Bypass
Unlock Bypass Program (Note 11)
Unlock Bypass Reset (Note 12)
Chip Erase
Sector Erase
Erase Suspend (Note 13)
Erase Resume (Note 14)
CFI Query (Note 15)
See Tables 1 through 3 for description of bus operations.
command sequence, all bus cycles are write cycles.
except for RD and PD.
mode.
(or to the erase-suspend-read mode if previously in Erase
Suspend) when a bank is in the autoselect mode, or if DQ5 goes
high (while the bank is providing status information).
Manufacturer ID
Device ID
SecSi Sector Factory
Protect (Note 9)
Sector Protect Verify
(Note 10)
Command
Sequence
(Note 1)
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Word
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
1
1
4
4
4
4
3
4
4
3
2
2
6
6
1
1
1
Addr
Table 12. DS42585 Command Definitions
XXX
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
XXX
AAA
AAA
555
555
555
555
555
555
555
555
555
555
RA
BA
BA
BA
AA
55
First
Data
RD
AA
AA
AA
AA
AA
AA
AA
AA
AA
AA
F0
A0
B0
90
30
98
P R E L I M I N A R Y
Addr
XXX
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
555
555
555
555
555
555
555
555
555
555
PA
Second
DS42585
Data
PD
55
55
55
55
55
55
55
55
00
55
55
(BA)AAA
(BA)AAA
(BA)AAA
(BA)AAA
(BA)555
(BA)555
(BA)555
(BA)555
PD = Data to be programmed at location PA. Data latches on the rising
edge of WE# or CE#f pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A20–A12 uniquely select any sector.
BA = Address of the bank that is being switched to autoselect mode, is
in bypass mode, or is being erased.
8. The fourth cycle of the autoselect command sequence is a read
9. The data is 80h for factory locked and 00h for not factory locked.
10. The data is 00h for an unprotected sector/sector block and 01h
11. The Unlock Bypass command is required prior to the Unlock
12. The Unlock Bypass Reset command is required to return to
13. The system may read and program in non-erasing sectors, or
14. The Erase Resume command is valid only during the Erase
Addr
AAA
AAA
AAA
AAA
AAA
AAA
555
555
555
555
555
555
cycle. The system must provide the bank address to obtain the
manufacturer ID, device ID, or SecSi Sector factory protect
information. Data bits DQ15–DQ8 are don’t care. See the
Autoselect Command Sequence section
for a protected sector/sector block.
Bypass Program command.
reading array data when the bank is in the unlock bypass mode.
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation, and requires the bank address.
Third
Bus Cycles (Notes 2–5)
Data
90
90
90
90
88
90
A0
20
80
80
(BA)X00
(BA)X01
(BA)X02
(BA)X03
(BA)X06
(SA)X02
(SA)X04
Addr
XXX
AAA
AAA
555
555
PA
Fourth
81/01
00/01
Data
PD
AA
AA
01
00
Addr
2AA
2AA
555
555
Fifth
Data
for more information.
55
55
Addr
AAA
555
SA
Sixth
Data
10
30
27