ds42585 Advanced Micro Devices, ds42585 Datasheet - Page 31

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ds42585

Manufacturer Part Number
ds42585
Description
Stacked Multi-chip Package Mcp Flash Memory And Sram
Manufacturer
Advanced Micro Devices
Datasheet
Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further
3. When reading write operation status bits, the system must always provide the bank address where the Embedded Algorithm
Standard
Suspend
Erase
Mode
Mode
Refer to the section on DQ5 for more information.
details.
is in progress. The device outputs array data if the system addresses a non-busy bank.
Embedded Program Algorithm
Embedded Erase Algorithm
Erase-Suspend-Program
Erase-Suspend-
Read
Status
Erase
Suspended Sector
Non-Erase
Suspended Sector
Table 13. Write Operation Status
P R E L I M I N A R Y
(Note 2)
DQ7#
DQ7#
DQ7
Data
0
1
DS42585
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Toggle
Toggle
DQ6
Data
(Note 1)
DQ5
Data
0
0
0
0
DQ3
Data
N/A
N/A
N/A
1
No toggle
(Note 2)
Toggle
Toggle
DQ2
Data
N/A
RY/BY#
0
0
1
1
0
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