cynse70032 Cypress Semiconductor Corporation., cynse70032 Datasheet - Page 45

• Manufacturer Part Number: cynse70032
• Description: Network Search Engine
• Manufacturer: Cypress Semiconductor Corporation.

by the GMR Index in the command’s cycle A. The 68-bit word K (presented on the DQ bus in cycles A and B of the command)
is also stored in both even and odd comparand register pairs in each of the eight devices (and selected by the Comparand
Register Index in command’s cycle B). In the x68 configuration, the even comparand register can subsequently be used by the
Learn command, but only in the first non-full device. The word K (presented on the DQ bus in cycles A and B of the command)
is compared with each entry in the table, starting at location 0. The first matching entry’s location address L is the winning address
that is driven as part of the SRAM address on the SADR[21:0] lines (see “SRAM Addressing” on page 98). The global winning
device will drive the bus in a specific cycle. On global miss cycles the device with LRAM = 1 and LDEV = 1 will be the default
driver for such missed cycles.
The Search command is a pipelined operation and executes a search at half the rate of the frequency of CLK2X for 68-bit searches
in ×68-configured tables. The latency of SADR, CE_L, ALE_L, WE_L, SSV, and SSF from the 68-bit Search command cycle (two
CLK2X cycles) is shown in Table 13-7.
Table 13-7. Search Latency from Instruction to SRAM Access Cycle
For up to 31 devices in the table (TLSZ = 10), search latency from command to SRAM access cycle is 6. In addition, SSV and
SSF shift further to the right for different values of HLAT as specified in Table 13-8.
Table 13-8. Shift of SSF and SSV from SADR
13.4
Figure 13-23 shows the timing diagram for a Search command in the 136-bit-configured table (CFG = 01010101) consisting of a
single device for one set of parameters: TLSZ = 00, HLAT = 001, LRAM = 1, LDEV = 1. The hardware diagram for this Search
subsystem is shown in Figure 13-24.
Document #: 38-02042 Rev. *E
Number of Devices
1–31 (TLSZ = 10)
1–8 (TLSZ = 01)
1 (TLSZ = 00)
136-bit Search on Tables Configured as ×136 Using a Single CYNSE70032 Device
HLAT
Must be same in each of the eight
000
001
010
100
101
011
110
111
Will be same in each of the eight
Comparand Register (odd)
Comparand Register (even)
67
devices
devices
K
K
Figure 13-22. ×68 Table with 31 Devices
Max Table Size
128K × 68 bits
496K × 68 bits
0
16K × 68 bits
507903
Location
address
L
0
1
2
3
67
67
(68-bit configuration)
CFG = 00000000
GMR
Number of CLK Cycles
K
0
1
2
3
4
5
6
7
0
0
Latency in CLK Cycles
(First matching entry)
4
5
6
CYNSE70032
Page 45 of 126