t6020m ATMEL Corporation, t6020m Datasheet - Page 19

• Manufacturer Part Number: t6020m
• Description: Low-current Microcontroller For Watchdog Function
• Manufacturer: ATMEL Corporation

3
3.1
Accessing the peripheral modules takes place via the I/O
bus (see figure 21). The IN or OUT instructions allow di-
rect addressing of up to 16 I/O modules. A dual register
addressing scheme has been adopted to enable direct ad-
dressing of the ”primary register”. To address the
”auxiliary register”, the access must be switched with an
”auxiliary switching module”. Thus a single IN (or OUT)
to the module address will read (or write) into the module
Rev. A3, 02-Apr-01
Example of
qFORTH
Program
Code
Addr.(ASW) = Auxiliary Switch Module Address
Addr.(Mx) = Module Mx Addr ess
Addr.(SPort) = Subport Address
Prim._Data = data to be written into Primar y Register.
Aux._Data = da ta to be written into Auxilia ry Register
Aux. _ Data ( lo ) = data to be written into Auxiliar y Re g ister ( low nibble )
Module ASW
Auxiliary Switch
Module
Primary Reg.
Peripheral Modules
Addressing Peripherals
2
2
2
1
2
1
1
2
2
1
(Address Pointer)
Addr.(SPort) Addr.(M1)
SPort_Data
SPort_Data(lo) Addr.(M1)
SPort_Data(hi) Addr.(M1) OUT
Subaddress Reg.
Addr.(SPort) Addr.(M1)
Addr.(SPort) Addr.(M1)
Addr.(SPort) Addr.(M1)
(Subport Register Write)
(Subport Register Read)
(Subport Register Write Byte)
(Subport Register Rea d Byte)
1
Module M1
Indirect Subport
Access
Addr.(M 1)
Addr.(M 1)
Addr.(M 1)
Addr.(M1)
Bank of
Primary Regs.
Subport Fh
Subport 1
Subport Eh
Subport 0
Figure 18. Example of I/O addressing
OUT
OUT
OUT
IN
OUT
OUT
IN
IN
OUT
2
(hi)
(lo)
I/O bus
3
4
5
3
4
5
4
5
5
Prim._Data
Address(M2) Address(ASW) OUT
Aux._Data
Address(M2) Address(ASW) OUT
Address(M2) Address(ASW) OUT
Aux._Data(lo) Address(M2) OUT
Aux._Data(hi) Address(M2) OUT
(lo) = SPort_Data (low nibble)
(hi) = SPort_Data (high nibble)
Aux._Data (hi) = da ta to be written into Auxiliar y Register (high nibble)
SPort_Data(lo) = data to be written into SubP ort (low nibble)
SPort_Data(hi) = da ta to be written into Subport (high nibble)
( Auxiliary Register Write )
(Primary Register Write)
(Primary Register Rea d)
(Auxiliary Register Rea d)
(Auxiliary Register Write Byte)
Aux. Reg.
5
primary register. Accessing the auxiliary register is per-
formed with the same instruction preceded by writing the
module address into the auxiliary switching module. Byte
wide registers are accessed by multiple IN- (or OUT-)
instructions. For more complex peripheral modules, with
a larger number of registers, extended addressing is used.
In this case a bank of up to 16 subport registers are indi-
rectly addressed with the subport address. The first
OUT-instruction writes the subport address to the sub-
address register, the second IN- or OUT-instruction reads
data from or writes data to the addressed subport.
4
Module M2
Dual Register
Access
Address(M 2)
Address(M 2) IN
Address(M2) OU T
Address(M2) OUT
Primary Reg.
IN
3
6
6
to other modules
Prim._Data Address(M3) O UT
(Prima ry Register Read)
(Prima ry Register Write)
Single Register
Access
Primary Reg.
Module M3
T6020M
Address(M3) IN
6
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