t6020m ATMEL Corporation, t6020m Datasheet - Page 13

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t6020m

Manufacturer Part Number
t6020m
Description
Low-current Microcontroller For Watchdog Function
Manufacturer
ATMEL Corporation
Datasheet

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A power-on reset pulse is generated by a V
the default BOT voltage level (3.0 V). A brown-out reset
pulse is generated when V
voltage threshold. Two values for the brown-out voltage
threshold are programmable via the BOT-bit in the
SC-register. When the controller runs in the upper supply
voltage range with a high system clock frequency, the
high threshold must be used. When it runs with a lower
system clock frequency, the low threshold and a wider
supply voltage range may be chosen. For further details,
see the electrical specification and the SC-register
description for BOT programming.
2.3.2
The watchdog’s function can be enabled at the WDC-reg-
ister and triggers a reset with every watchdog counter
overflow. To supress the watchdog reset, the watchdog
counter must be regularly reset by reading the watchdog
register address (CWD).
The CPU reacts in exactly the same manner as a reset
stimulus from any of the above sources.
2.3.3
The external input clock supervisor function can be
enabled if the external input clock is selected within the
CM- and SC-registers of the clock module.
The CPU reacts in exactly the same manner as a reset
stimulus from any of the above sources.
Rev. A3, 02-Apr-01
Watchdog Reset
External Clock Supervisor
DD
falls below the brown-out
DD
rise across
2.4
The voltage monitor consists of a comparator with
internal voltage reference. It is used to supervise the
supply voltage or an external voltage at the VMI-pin. The
comparator for the supply voltage has two internal
programmable thresholds one lower threshold (4.0 V) and
one higher threshold (5.0 V). For external voltages at the
VMI-pin, the comparator threshold is set to V
V. The VMS-bit indicates if the supervised voltage is
below (VMS = 0) or above (VMS = 1) this threshold. An
interrupt can be generated when the VMS-bit is set or
reset to detect a rising or falling slope. A voltage monitor
interrupt (INT7) is enabled when the interrupt mask bit
(VIM) is reset in the VMC-register.
BP41/
VMI
VMC :
Voltage Monitor
VMST :
VM2
IN
Figure 11. Voltage monitor
Voltage monitor
VM1 VM0 VIM
V
DD
res
T6020M
OUT
VMS
BG
13 (54)
= 1.25
INT7
13754

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