sl28eb719 Silicon Laboratories, sl28eb719 Datasheet - Page 2

• Manufacturer Part Number: sl28eb719
• Description: Eproclock Generator For Intel Tunnel Creek & Top Cliff
• Manufacturer: Silicon Laboratories

DOC#: SP-AP-0005 (Rev. AB)
48-TSSOP Pin Definitions
Pin No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
1
2
3
4
5
6
7
8
9
NC
NC
CLKREQ#1**
CLKREQ#2**
PCI0 / SEL_SATA75**
GND_PCI
VDD_PCI
PCIF / ITP_EN**
CLKREQ#3**
12_48M / SEL12_48*
VDD_48
48M / FSA**
GND_48
DOT96
DOT96#
FSB**
GND_SATA
SRC0 / SATA_75M
SRC0# / SATA_75M#
VDD_SATA
SRC1
SRC1#
SRC2
SRC2#
GND_SRC
VDD_SRC
SRC6# / CPU2#_ITP
SRC6 / CPU2_ITP,
CPU1#
CPU1
VDD_CPU
CPU0#
CPU0
GND_CPU
Name
I/O, SE,
I/O, SE
I/O, SE
O, DIF Fixed true 96MHz clock output
O, DIF Fixed complement 96MHz clock output
O, DIF 75MHz or 100MHz True differential serial reference clock
O, DIF 75MHz or 100MHz Complement differential serial reference clock
O, DIF 100MHz True differential serial reference clock
O, DIF 100MHz Complement differential serial reference clock
O, DIF 100MHz True differential serial reference clock
O, DIF 100MHz Complement differential serial reference clock
O, DIF Selectable complementary differential CPU or SRC clock output.
O, DIF Selectable True differential CPU or SRC clock output.
O, DIF Complement differential CPU clock output
O, DIF True differential CPU clock output
O, DIF Complement differential CPU clock output
O, DIF True differential CPU clock output
PWR
PWR
PWR
PWR
PWR
Type
I, PD
I, PD
GND
I, PD
GND
I, PD
GND
GND
GND
NC
NC
PD
PD
PU
I/O
PD
No Connect.
No Connect.
3.3V clock request input (internal 100K-ohm pull-down)
3.3V clock request input (internal 100K-ohm pull-down)
33MHz clock output/3.3V LVTTL input to enable 75MHz SATA (internal
100K-ohm pull-down)
0 = SATA75/SRC0 = 100MHz, 1 = SATA75/SRC0 = 75MHz
Ground for PCI clocks
3.3V Power supply for PCI clocks
33 MHz free running clock output/3.3V LVTTL input to enable SRC6 or
CPU2_ITP (sampled on the CKPWRGD assertion)
0= SRC6, 1= CPU2
3.3V clock request input (internal 100K-ohm pull-down)
12 MHz/ 48MHz Clock output/3.3V-tolerance input for 12MHz or 48MHz
selection (Sampled at CKPWRGD assertion) (internal 100K-ohm pull-up)
0 = 48M, 1 = 12M
3.3V Power supply for 48MHz clocks
Fixed 48 MHz clock output/3.3V-tolerant input for CPU frequency selection
(internal 100K-ohm pull-down)
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
Ground for 48MHz clocks
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
Ground for SATA clock
3.3V Power supply for SATA clock
Ground for SRC clocks
3.3V Power supply for SRC clocks
ITP_EN = 0 @ CK_PWRGD assertion = SRC6
ITP_EN = 1 @ CK_PWRGD assertion = CPU2
ITP_EN = 0 @ CK_PWRGD assertion = SRC6
ITP_EN = 1 @ CK_PWRGD assertion = CPU2
3.3V Power supply for CPU clocks
Ground for clocks
3.3V-tolerant input for CPU frequency selection (internal 100K-ohm pull-down)
Description
SL28EB719
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