sc9s08mz16 Freescale Semiconductor, Inc, sc9s08mz16 Datasheet - Page 98

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sc9s08mz16

Manufacturer Part Number
sc9s08mz16
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 6 Parallel Input/Output
6.7.14
In addition to the I/O control, port G pins are controlled by the registers listed below.
98
PTGDD[6:5,
PTGPE[6:5,
Reset
Reset
Reset
6:5, 3:0
6:5, 3:0
Field
Field
3:0]
3:0]
W
W
W
R
R
R
Port G Pin Control Registers (PTGPE, PTGSE, PTGDS)
Data Direction for Port G Bits — These read/write bits control the direction of port G pins and what is read for
PTGD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port G bit n and PTGD reads return the contents of PTGDn.
Internal Pullup Enable for Port G Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTG pin. For port G pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port G bit n.
1 Internal pullup device enabled for port G bit n.
0
0
0
0
0
0
7
7
7
Figure 6-43. Output Slew Rate Control Enable for Port G Bits (PTGSE)
PTGDD6
PTGPE6
PTGSE6
Figure 6-42. Internal Pullup Enable for Port G Bits (PTGPE)
0
0
0
6
6
6
Table 6-32. PTGDD Register Field Descriptions
Figure 6-41. Data Direction for Port G (PTGDD)
Table 6-33. PTGPE Register Field Descriptions
SC9S08MZ16 MCU Data Sheet, Rev. 0 Draft C
PTGDD5
PTGPE5
PTGSE5
0
0
0
5
5
5
0
0
0
0
0
0
4
4
4
Description
Description
PTGDD3
PTGPE3
PTGSE3
3
0
3
0
3
0
PTGDD2
PTGPE2
PTGSE2
0
0
0
2
2
2
PTGDD1
PTGPE1
PTGSE1
Freescale Semiconductor
0
0
0
1
1
1
PTGDD0
PTGPE0
PTGSE0
0
0
0
0
0
0

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