sc9s08mz16 Freescale Semiconductor, Inc, sc9s08mz16 Datasheet - Page 96

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sc9s08mz16

Manufacturer Part Number
sc9s08mz16
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Note: Bits 7, 6, 3 and 2 are reserved bits that must always be written to 0.
Note: Bits 7, 6, 3 and 2 are reserved bits that must always be written to 0.
Note: Bits 7, 6, 3 and 2 are reserved bits that must always be written to 0.
Chapter 6 Parallel Input/Output
6.7.12
In addition to the I/O control, port F pins are controlled by the registers listed below.
96
[5:4, 1:0]
PTFDDn
[5:4, 1:0]
Reset
Reset
Reset
PTFPE
Field
Field
W
W
W
R
R
R
Port F Pin Control Registers (PTFPE, PTFSE, PTFDS)
Data Direction for Port F Bits — These read/write bits control the direction of port F pins and what is read for
PTFD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port F bit n and PTFD reads return the contents of PTFDn.
Internal Pullup Enable for Port F Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTF pin. For port F pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port F bit n.
1 Internal pullup device enabled for port F bit n.
R
R
R
0
0
0
7
7
7
Figure 6-38. Output Slew Rate Control Enable for Port F (PTFSE)
R
R
R
0
0
0
6
6
6
Figure 6-37. Internal Pullup Enable for Port F (PTFPE)
Table 6-27. PTFDD Register Field Descriptions
Table 6-28. PTFPE Register Field Descriptions
Figure 6-36. Data Direction for Port F (PTFDD)
SC9S08MZ16 MCU Data Sheet, Rev. 0 Draft C
PTFDD5
PTFPE5
PTFSE5
0
0
0
5
5
5
PTFDD4
PTFPE4
PTFSE4
0
0
0
4
4
4
Description
Description
R
R
R
3
0
3
0
3
0
R
R
R
0
0
0
2
2
2
PTFDD1
PTFPE1
PTFSE1
Freescale Semiconductor
0
0
0
1
1
1
PTFDD0
PTFPE0
PTFSE0
0
0
0
0
0
0

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