sc9s08mz16 Freescale Semiconductor, Inc, sc9s08mz16 Datasheet - Page 82

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sc9s08mz16

Manufacturer Part Number
sc9s08mz16
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 6 Parallel Input/Output
6.3.6
Port F pins are general-purpose I/O pins. Parallel I/O function is controlled by the port F data (PTFD) and
data direction (PTFDD) registers which are located in page zero register space. The pin control registers,
pullup enable (PTFPE), slew rate control (PTFSE), and drive strength select (PTFDS) are located in the
high page registers. Refer to
general-purpose I/O control and
Port F general-purpose I/O is shared with TPM1 and TPM2 timer channels. When any of these shared
functions is enabled, the direction, input or output, is controlled by the shared function and not by the data
direction register of the parallel I/O port. Also, for pins which are configured as outputs by the shared
function, the output data is controlled by the shared function and not by the port data register.
Refer to
channel pins.
6.3.7
Port G pins are general-purpose I/O pins. Parallel I/O function is controlled by the port G data (PTGD) and
data direction (PTGDD) registers which are located in page zero register space. The pin control registers,
pullup enable (PTGPE), slew rate control (PTGSE), and drive strength select (PTGDS) are located in the
high page registers. Refer to
general-purpose I/O control and
Port G general-purpose I/O is shared with XTAL and EXTAL. When the external oscillator is enabled,
PTG5 and PTG6 function as oscillator pins. In this case the associated parallel I/O and pin control registers
have no control of the pins.
Refer to
as XTAL and EXTAL pins.
6.4
Reading and writing of parallel I/O is done through the port data registers. The direction, input or output,
is controlled through the port data direction registers. The parallel I/O port function for an individual pin
is illustrated in the block diagram below.
82
Chapter 8, “Internal Clock Generator
Port F
Chapter 9, “Timer/PWM
Parallel I/O Control
Port F
Port G
Port G
MCU Pin:
MCU Pin:
Bit 7
R
Bit 7
Section 6.4, “Parallel I/O
Section 6.4, “Parallel I/O
R
SC9S08MZ16 MCU Data Sheet, Rev. 0 Draft C
Section 6.5, “Pin
Section 6.5, “Pin
(S08TPMV3)” for more information about using port F pins as TPM
R
EXTAL
6
PTG6/
Figure 6-8. Port G Pin Names
Figure 6-7. Port F Pin Names
6
TPM2CH1
PTF5/
(S08ICGV4)” for more information about using port G pins
PTG5/
XTAL
5
5
Control” for more information about pin control.
Control” for more information about pin control.
TPM2CH0
Control” for more information about
Control” for more information about
PTF4/
4
R
4
PTG3
3
R
3
PTG2
2
R
2
PTG1
TPM1CH3
Freescale Semiconductor
1
PTF1/
1
PTG0
Bit 0
TPM1CH2
PTF0/
Bit 0

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