si5338b Silicon Laboratories, si5338b Datasheet - Page 24

• Manufacturer Part Number: si5338b
• Description: I2c-programmable Any-rate , Any-output Quad Clock Generator
• Manufacturer: Silicon Laboratories

Si5338
24
Pin #
3
4
5
Pin Name
IN3
IN4
IN5
Table 19. Si5338 Pin Descriptions (Continued)
I/O
I
I
I
Signal Type
Multi
Multi
Multi
Rev. 0.3
CLKIN
High impedance input for single ended signals such as
CMOS, SSTL or HSTL. The input should be dc-coupled.
PINC
This pin function is active for devices Si5338D/E/F. A
positive pulse of greater than 100ns width (followed by
>100 ns low) will increase the input to output device
latency by a programmed amount. The effect of this pin
can be preprogrammed at the factory and/or the I
interface can also be used to set the function of this pin.
FINC
This pin function is active for devices Si5338G/H/J. A
positive pulse of greater than 100 ns width (followed by
>100ns low) will increase the output frequency of the
clock output by a programmed amount. The function of
this pin can be preprogrammed at the factory and/or the
I
I2C_LSB
This pin is the LSB of the Si5338 I
PDEC
This pin function is active for devices Si5338D/E/F. A
positive pulse of greater than 100 ns width (followed by
>100ns low) will decrease the input to output device
latency by a programmed amount. The function of this
pin can be preprogrammed at the factory and/or the I
interface can also be used to set the function of this pin.
FDEC
This pin function is active for devices Si5338G/H/J. A
positive pulse of greater than 100ns width (followed by
>100ns low) will decrease the output frequency of the
clock output by a programmed amount. The effect of this
pin can be preprogrammed at the factory and/or the I
interface can also be used.
GND
If a zero delay buffer is not implemented, this pin should
be connected to GND.
FDBK
In zero delay buffer mode, one side of a differential input
should be supplied to this pin. The other side of the
differential input should be supplied to IN6. This pin
functions as the feedback clock input for the PLL phase
frequency detector.
2
C interface can also be used.
Description
2
C address.
2
C
2
2
C
C