upd78f0134hgka1-9et-a Renesas Electronics Corporation., upd78f0134hgka1-9et-a Datasheet - Page 382

• Manufacturer Part Number: upd78f0134hgka1-9et-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

19.2 Standby Function Operation
19.2.1 HALT mode
(1) HALT mode
Notes 1.
382
Item
System clock
CPU
Port (latch)
16-bit timer/event counter 00
16-bit timer/event counter 01
8-bit timer/event counter 50
8-bit timer/event counter 51
8-bit timer H0
8-bit timer H1
Watch timer
Watch-
dog
timer
A/D converter
Serial
interface
Clock monitor
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
The HALT mode is set by executing the HALT instruction. HALT mode can be set regardless of whether the CPU
clock before the setting was the high-speed system clock, internal oscillation clock, or subsystem clock.
The operating statuses in the HALT mode are shown below.
2.
3.
4.
5.
Internal oscillator
cannot be stopped
Internal oscillator can
be stopped
HALT Mode Setting
When “Stopped by software” is selected for internal oscillator by the option byte and internal oscillator is
stopped by software (for option bytes, see CHAPTER 24 OPTION BYTE).
Operable when the high-speed system clock is selected.
Operation not guaranteed when other than subsystem clock is selected.
“Internal oscillator cannot be stopped” or “internal oscillator can be stopped by software” can be selected
by the option byte.
UART0
UART6
CSI10
CSI11
PD78F0133H, 78F0134H, 78F0136H, 78F0138H, and 78F0138HD only.
Note 5
Note 2
Note 2
Note 5
Clock supply to the CPU is stopped
Operable
Operable
Operable
Operable
Operable
Operable
Operation stopped
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operation stopped
Status before HALT mode was set is retained
Operable
Operable
Operable
Operable
Clock Used
Subsystem
When Internal Oscillator
Oscillation Continues
When HALT Instruction Is Executed While CPU Is
When
Table 19-2. Operating Statuses in HALT Mode (1/2)
Operating on High-Speed System Clock
Operable
Note 3
Subsystem
CHAPTER 19 STANDBY FUNCTION
Clock Not
When
Used
User’s Manual U16899EJ3V0UD
Operable
Operation stopped
Clock Used
Subsystem
When Internal Oscillator
Oscillation Stopped
When
Operable
Note 3
Subsystem
Clock Not
When
Used
Note 1
Clock Oscillation Continues
Operation not guaranteed
Operation not guaranteed
Operation not guaranteed when count clock other than
TI50 is selected
Operation not guaranteed when count clock other than
TI51 is selected
Operation not guaranteed when count clock other than
TM50 output is selected during 8-bit timer/event counter
50 operation
Operation not guaranteed when count clock other than
f
Operable
Note 4
Operable
Operation not guaranteed
Operation not guaranteed when serial clock other than
TM50 output is selected during TM50 operation
Operation not guaranteed when serial clock other than
external SCK10 is selected
Operation not guaranteed when serial clock other than
external SCK11 is selected
Operable
Operation not guaranteed
When High-Speed System
Clock Used
Subsystem
R
/2
When HALT Instruction Is Executed While CPU Is
When
7
is selected
Operating on Internal Oscillation Clock
Operation not
guaranteed
Subsystem
Clock Not
When
Used
When High-Speed System
Operable
Note 4
Operation stopped
Clock Used
Clock Oscillation Stopped
Subsystem
When
Operation not
guaranteed
Subsystem
Clock Not
When
Used