upd78f0114hgb-8es-a Renesas Electronics Corporation., upd78f0114hgb-8es-a Datasheet - Page 503

• Manufacturer Part Number: upd78f0114hgb-8es-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

3rd edition
Edition
Modification of Table 5-6. Maximum Time Required for CPU Clock Switchover
Addition of description for when used as capture register to Interrupt request generation
column in
Figure 6-5. Format of 16-Bit Timer Mode Control Register 00 (TMC00)
Modification of Note 1 and correction of Cautions 4 and 5 in Figure 6-8. Format of
Prescaler Mode Register 00 (PRM00)
Modification of Caution 1 in 6.4.6 (1) One-shot pulse output with software trigger
Modification of Caution in 6.4.6 (2) One-shot pulse output with external trigger
Modification of 6.5 (5) Re-triggering one-shot pulse
Modification of Note in Figure 7-5. Format of Timer Clock Selection Register 50
(TCL50)
Modification of Note in Figure 7-6. Format of Timer Clock Selection Register 51
(TCL51)
Modification of Note 1 in Figure 8-5. Format of 8-Bit Timer H Mode Register 0
(TMHMD0)
Modification of Note in Figure 8-6. Format of 8-Bit Timer H Mode Register 1
(TMHMD1)
Modification of error value in 9.4.1 Watch timer operation
Modification of Table 10-1. Loop Detection Time of Watchdog Timer
Modification of Note 1 in Figure 12-4. Format of Baud Rate Generator Control
Register 0 (BRGC0)
Modification of Note 1 in Figure 13-8. Format of Clock Selection Register 6 (CKSR6)
Modification of Caution in 13.3 (6) Asynchronous serial interface control register 6
(ASICL6)
Modification of Caution 1, 2 and 4 in Figure 13-10. Format of Asynchronous Serial
Interface Control Register 6 (ASICL6).
Modification of (h) SBF transmission in 13.4.2 Asynchronous serial interface (UART)
mode
Modification of Note in Figure 14-3. Format of Serial Clock Selection Register 10
(CSIC10)
Modification of Caution 3 in Figure 15-2. Format of Interrupt Request Flag Registers
(IF0L, IF0H, IF1L)
Addition of Caution in 17.1.2 (2) Oscillation stabilization time select register (OSTS)
Modification of Figure 18-1. Block Diagram of Reset Function
Modification of Note in Figure 21-3. Format of Low-Voltage Detection Level Selection
Register (LVIS)
Modification of Figure 23-10. FLMD1 Pin Connection Example
Addition of description in 23.5.7 Power supply
APPENDIX E REVISION HISTORY
User’s Manual U16961EJ4V0UD
Description
CHAPTER 5 CLOCK
GENERATOR
CHAPTER 6 16-BIT
TIMER/EVENT
COUNTER 00
CHAPTER 7 8-BIT
TIMER/EVENT
COUNTERS 50 AND 51
CHAPTER 8 8-BIT
TIMERS H0 AND H1
CHAPTER 9 WATCH
TIMER
CHAPTER 10
WATCHDOG TIMER
CHAPTER 12 SERIAL
INTERFACE UART0
CHAPTER 13 SERIAL
INTERFACE UART6
CHAPTER 14 SERIAL
INTERFACE CSI10
CHAPTER 15
INTERRUPT
FUNCTIONS
CHAPTER 17
STANDBY FUNCTION
CHAPTER 18 RESET
FUNCTION
CHAPTER 21 LOW-
VOLTAGE DETECTOR
CHAPTER 23 FLASH
MEMORY
Applied to:
(2/3)
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