upd78f0114hgb-8es-a Renesas Electronics Corporation., upd78f0114hgb-8es-a Datasheet - Page 317

• Manufacturer Part Number: upd78f0114hgb-8es-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

Maskable
Software
Reset
Interrupt
Notes 1.
Type
2.
3.
4.
Priority
Default
The default priority is the priority applicable when two or more maskable interrupts are generated
simultaneously. 0 is the highest priority, and 21 is the lowest.
Basic configuration types (A) to (D) correspond to (A) to (D) in Figure 15-1.
When bit 1 (LVIMD) of the low-voltage detection register (LVIM) is cleared to 0.
When bit 1 (LVIMD) of the low-voltage detection register (LVIM) is set to 1.
10
11
12
13
14
15
16
17
18
19
20
21
0
1
2
3
4
5
6
7
8
9
Note 1
INTLVI
INTP0
INTP1
INTP2
INTP3
INTP4
INTP5
INTSRE6
INTSR6
INTST6
INTCSI10/
INTST0
INTTMH1
INTTMH0
INTTM50
INTTM000
INTTM010
INTAD
INTSR0
INTWTI
INTTM51
INTKR
INTWT
BRK
RESET
POC
LVI
Clock monitor High-speed system clock oscillation stop
WDT
Name
Low-voltage detection
Pin input edge detection
UART6 reception error generation
End of UART6 reception
End of UART6 transmission
End of CSI10 communication/end of UART0
transmission
Match between TMH1 and CMP01
(when compare register is specified)
Match between TMH0 and CMP00
(when compare register is specified)
Match between TM50 and CR50
(when compare register is specified)
Match between TM00 and CR000
(when compare register is specified),
TI010 pin valid edge detection
(when capture register is specified)
Match between TM00 and CR010
(when compare register is specified),
TI000 pin valid edge detection
(when capture register is specified)
End of A/D conversion
End of UART0 reception or reception error
generation
Watch timer reference time interval signal
Match between TM51 and CR51
(when compare register is specified)
Key interrupt detection
Watch timer overflow
BRK instruction execution
Reset input
Power-on-clear
Low-voltage detection
detection
WDT overflow
CHAPTER 15 INTERRUPT FUNCTIONS
Table 15-1. Interrupt Source List
Interrupt Source
User’s Manual U16961EJ4V0UD
Trigger
Note 3
Note 4
Internal
External
Internal
External
Internal
External
Internal/
Address
000AH
000CH
000EH
001AH
001CH
001EH
002AH
002CH
002EH
003EH
Vector
0004H
0006H
0008H
0010H
0012H
0014H
0016H
0018H
0020H
0022H
0024H
0026H
0028H
0000H
Table
Configuration
Type
Basic
(C)
(D)
(A)
(B)
(A)
(A)
Note 2
317