cy28416 Cypress Semiconductor Corporation., cy28416 Datasheet - Page 6

• Manufacturer Part Number: cy28416
• Description: Next Generation Ftg For Intel Architecture
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-07657 Rev. *C
Byte 4: Control Register 4
Byte 5: Control Register 5
Byte 6: Control Register 6
Bit
Bit
Bit
1
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
0
Externally
Externally
Externally
selected
selected
selected
@Pup
@Pup
@Pup
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
PCIF, SRC, PCI
CPU[T/C]2_ITP
SRC[T/C][4:0]
SRC[T/C][4:0]
RESERVED
RESERVED
DOT96[T/C]
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
CPU[T/C]1
CPU[T/C]0
PCIF1
PCIF0
Name
Name
Name
REF1
REF0
RESERVED, Set = 0
Test Clock Mode Entry Control
0 = Normal operation, 1 = Hi-Z mode
REF1 Output Drive Strength
0 = Low, 1 = High
REF0 Output Drive Strength
0 = Low, 1 = High
SW PCI_STP# Function
0=SW PCI_STP assert, 1= SW PCI_STP deassert
When this bit is set to 0, all STOPPABLE PCI, PCIF, and SRC outputs will
be stopped in a synchronous manner with no short pulses.
When this bit is set to 1, all STOPPED PCI, PCIF, and SRC outputs will
resume in a synchronous manner with no short pulses.
FS_C. Reflects the value of the FS_C pin sampled on power-up
0 = FS_C was low during VTT_PWRGD# assertion
FS_B. Reflects the value of the FS_B pin sampled on power-up
0 = FS_B was low during VTT_PWRGD# assertion
FS_A. Reflects the value of the FS_A pin sampled on power-up
0 = FS_A was low during VTT_PWRGD# assertion
RESERVED, Set = 0
DOT_PWRDWN Drive Mode
0 = Driven in PWRDWN, 1 = Tri-state
Allow control of PCIF2 with assertion of SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Allow control of PCIF1 with assertion of SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
RESERVED, Set = 0
RESERVED, Set = 1
RESERVED, Set = 1
RESERVED, Set = 1
SRC[T/C] Stop Drive Mode
0 = Driven when SW PCI_STP# asserted,1 = Tri-state when SW
PCI_STP# asserted
RESERVED, Set = 0
RESERVED, Set = 0
RESERVED, Set = 0
SRC[T/C] PWRDWN Drive Mode
0 = Driven when PD asserted,1 = Tri-state when PD asserted
CPU[T/C]2_ITP PWRDWN Drive Mode
0 = Driven when PD asserted,1 = Tri-state when PD asserted
CPU[T/C]1 PWRDWN Drive Mode
0 = Driven when PD asserted,1 = Tri-state when PD asserted
CPU[T/C]0 PWRDWN Drive Mode
0 = Driven when PD asserted,1 = Tri-state when PD asserted
Description
Description
Description
CY28416
Page 6 of 15
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