cy28551-3 Cypress Semiconductor Corporation., cy28551-3 Datasheet - Page 10

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cy28551-3

Manufacturer Part Number
cy28551-3
Description
Universal Clock Generator For Intel, Via And Sis
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Document #: 001-05677 Rev. *D
Byte 11: Control Register 11
Byte 12: Control Register 12
Byte 13: Control Register 13
Bit
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
@Pup
@Pup
@Pup
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Type
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Recovery_Frequency This bit allows selection of the frequency setting that the clock will be
WD_TIMER2
WD_TIMER1
WD_TIMER0
Time_Scale
Timer_SEL
WD_Alarm
DF3_N7
DF3_N6
DF3_N5
DF3_N4
DF3_N3
DF3_N2
DF3_N1
DF3_N0
WD_EN
DF2_N7
DF2_N6
DF2_N5
DF2_N4
DF2_N3
DF2_N2
DF2_N1
DF2_N0
Name
Name
Name
The DF2_N[8:0] will be used to configure CPU frequency for Dynamic
Frequency. DOC[1:2] =10
The DF3_N[8:0] will be used to configure CPU frequency for Dynamic
Frequency. DOC[1:2] =11
restored to once the system is rebooted
0: Use HW settings, 1: Recovery N[8:0]
Timer_SEL selects the WD reset function at the SRESET pin when WD
times out.
0 = Reset and Reload Recovery_Frequency
1 = Only Reset
Time_Scale allows selection of WD time scale
0 = 294 ms
WD_Alarm is set to “1” when the watchdog times out. It is reset to “0” when
the system clears the WD_TIMER time stamp.
Watchdog timer time stamp selection
000: Reserved (test mode)
001: 1 * Time_Scale
010: 2 * Time_Scale
011: 3 * Time_Scale
100: 4 * Time_Scale
101: 5 * Time_Scale
110: 6 * Time_Scale
111: 7 * Time_Scale
Watchdog timer enable, when the bit is asserted, Watchdog timer is
triggered and time stamp of WD_Timer is loaded
0 = Disable, 1 = Enable
1 = 2.34 s
Description
Description
Description
CY28551-3
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