cy2sstu32866 SpectraLinear Inc, cy2sstu32866 Datasheet - Page 23
![no-image](/images/no-image-200.jpg)
cy2sstu32866
Manufacturer Part Number
cy2sstu32866
Description
1.8v, 25-bit 1 1 Or 14-bit 1 2 Jedec-compliant Data Register With Parity
Manufacturer
SpectraLinear Inc
Datasheet
1.CY2SSTU32866.pdf
(24 pages)
- Current page: 23 of 24
- Download datasheet (230Kb)
Rev 1.0, November 25, 2006
Figure 29. Partial-parity-out ; propagation delay times with respect to clock inputs
Figure 28. Partial-parity-out ; propagation delay times with respect to clock
Output
V
t
V
V
V
t
V
PLH
PLH
TT
IH
IL
TT
I(P-P)
CK
= V
CK
= V
= V
= V
and t
and t
LVCMOS
= 600mV
REF
REF
RESET
DD
DD
Output
PHL
PHL
/2
/2
INPUT
- 250mV ( AC voltage levels) for differential inputs. V
+ 250mV (AC Voltage levels) for differential inputs. V
are the same as t
are the same as t
t
PLH
V
ICR
PD
PD
V
TT
V
inputs
DD
/2
IL
IH
t
PHL
= V
V
= V
TT
V
DD
ICR
DD
for LVCMOS inputs
t
for LVCMOS inputs.
PHL
V
TT
VOH
VOL
V
I(P-P)
V
V
V
V
OH
OL
CY2SSTU32866
IH
IL
Page 23 of 24
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