LTC2440 Linear Technology, LTC2440 Datasheet - Page 20

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LTC2440

Manufacturer Part Number
LTC2440
Description
24-Bit High Speed Differential delta-sigma ADC
Manufacturer
Linear Technology
Datasheet

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APPLICATIO S I FOR ATIO
Table 5. OSR vs Notch Frequency (f
Running at 9MHz
*Simultaneous 50/60 rejection
LTC2440
20
Figure 12. LTC2440 Normal Mode Rejection (Internal Oscillator)
–110
–100
–130
–140
–120
32768*
–80
–90
16384
1024
2048
4096
8192
OSR
128
256
512
64
47
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
49
U
51
U
53
55
N
57
) with Internal Oscillator
W
59
NOTCH (f
28.16kHz
14.08kHz
7.04kHz
3.52kHz
1.76kHz
880Hz
440Hz
220Hz
110Hz
61
55Hz
2440 F12
63
N
U
)
the noise performance of the device is 200nV
better than 80dB rejection of 50Hz ±2% and 60Hz ±2%.
Since the OSR is large (32,768) the wide band rejection is
extremely large and the antialiasing requirements are
simple. The first multiple of f
1.8MHz, see Figure 13.
The first NULL becomes f
(an output rate of 880Hz) and F
NULL has shifted, the sample rate remains constant. As a
result of constant modulator sampling rate, the linearity,
offset and full-scale performance remains unchanged as
does the first multiple of f
Figure 13. LTC2440 Normal Mode Rejection (Internal Oscillator)
–100
–120
–140
–20
–60
–40
–80
0
0
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
REJECTION > 120dB
N
1000000
S
= 7.04kHz with an OSR of 256
.
S
occurs at 55Hz • 32,768 =
O
1.8MHz
grounded. While the
1440 F13
2000000
sn2440, 2440fas
RMS
with

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