LTC2440 Linear Technology, LTC2440 Datasheet - Page 10

• Manufacturer Part Number: LTC2440
• Description: 24-Bit High Speed Differential delta-sigma ADC
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
LTC2440
operation cycle and data out format is compatible with the
LTC2410.
Initially, the LTC2440 performs a conversion. Once the
conversion is complete, the device enters the sleep state.
While in this sleep state, power consumption is reduced
below 10µA. The part remains in the sleep state as long as
CS is HIGH. The conversion result is held indefinitely in a
static shift register while the converter is in the sleep state.
Once CS is pulled LOW, the device begins outputting the
conversion result. There is no latency in the conversion
result. The data output corresponds to the conversion just
performed. This result is shifted out on the serial data out
pin (SDO) under the control of the serial clock (SCK). Data
is updated on the falling edge of SCK allowing the user to
reliably latch data on the rising edge of SCK (see Figure 3).
The data output state is concluded once 32-bits are read
out of the ADC or when CS is brought HIGH. The device au-
tomatically initiates a new conversion and the cycle repeats.
Through timing control of the CS, SCK and EXT pins, the
LTC2440 offers several flexible modes of operation
(internal or external SCK). These various modes do not
require programming configuration registers; moreover,
they do not disturb the cyclic operation described above.
These modes of operation are described in detail in the
Serial Interface Timing Modes section.
Ease of Use
The LTC2440 data output has no latency, filter settling
delay or redundant data associated with the conversion
cycle. There is a one-to-one correspondence between the
conversion and the output data. Therefore, multiplexing
multiple analog voltages is easy. Speed/resolution ad-
justments may be made seamlessly between two conver-
sions without settling errors.
The LTC2440 performs offset and full-scale calibrations
every conversion cycle. This calibration is transparent to
the user and has no effect on the cyclic operation de-
scribed above. The advantage of continuous calibration is
extreme stability of offset and full-scale readings with re-
spect to time, supply voltage change and temperature drift.
10
U
U
W
U
Power-Up Sequence
The LTC2440 automatically enters an internal reset state
when the power supply voltage V
approximately 2.2V. This feature guarantees the integrity
of the conversion result and of the serial interface mode
selection.
When the V
the converter creates an internal power-on-reset (POR)
signal with a duration of approximately 0.5ms. The POR
signal clears all internal registers. Following the POR
signal, the LTC2440 starts a normal conversion cycle and
follows the succession of states described above. The first
conversion result following POR is accurate within the
specifications of the device if the power supply voltage is
restored within the operating range (4.5V to 5.5V) before
the end of the POR time interval.
Reference Voltage Range
This converter accepts a truly differential external refer-
ence voltage. The absolute/common mode voltage speci-
fication for the REF
from GND to V
REF
The LTC2440 can accept a differential reference voltage
from 0.1V to V
mined by the thermal noise of the front-end circuits, and
as such, its value in microvolts is nearly constant with
reference voltage. A decrease in reference voltage will not
significantly improve the converter’s effective resolution.
On the other hand, a reduced reference voltage will im-
prove the converter’s overall INL performance.
Input Voltage Range
The analog input is truly differential with an absolute/
common mode range for the IN
extending from GND – 0.3V to V
these limits, the ESD protection devices begin to turn on
and the errors due to input leakage current increase
rapidly. Within these limits, the LTC2440 converts the
bipolar differential input signal, V
– FS = – 0.5 • V
+
pin must always be more positive than the REF
CC
voltage rises above this critical threshold,
CC
CC
REF
. The converter output noise is deter-
. For correct converter operation, the
+
and REF
to +FS = 0.5 • V
–
pins covers the entire range
+
IN
CC
and IN
= IN
REF
CC
+ 0.3V. Outside
+
where V
drops below
–
– IN
input pins
sn2440, 2440fas
–
, from
REF
–
pin.
=