LTC2431 Linear Technology, LTC2431 Datasheet - Page 24

• Manufacturer Part Number: LTC2431
• Description: (LTC2430 / LTC2431) 20-Bit No Latency Delta-Sigma ADCs
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
LTC2430/LTC2431
The typical +FS and –FS errors as a function of the sum of
the source resistance seen by IN
of C
In addition to this gain error, an offset error term may also
appear. The offset error is proportional with the mismatch
between the source impedance driving the two input pins
IN
reference common mode voltages. While the input drive
circuit nonzero source impedance combined with the
converter average input current will not degrade the INL
performance, indirect distortion may result from the modu-
lation of the offset error by the common mode component
of the input signal. Thus, when using large C
values, it is advisable to carefully match the source imped-
ance seen by the IN
24
+
Figure 15a. + FS Error vs R
Figure 15b. – FS Error vs R
and IN
IN
are shown in Figure 15.
–10
–15
–20
–
–5
10
20
15
0
and with the difference between the input and
5
0
0
0
V
V
V
V
V
F
T
V
V
V
V
V
F
T
O
CC
REF
REF
IN
IN
A
100
O
A
CC
REF
REF
IN
IN
100
= GND
= 25 C
+
–
= GND
= 25 C
+
–
= 5V
C
+
–
= 1.25V
= 3.75V
= 5V
+
–
= 3.75V
= 1.25V
IN
200
= 5V
= GND
200
= 5V
= GND
U
= 1 F, 10 F
300
300
+
and IN
400 500
R
400 500
R
SOURCE
SOURCE
C
U
IN
SOURCE
SOURCE
= 1 F, 10 F
600
( )
600
( )
–
C
+
IN
at IN
700
at IN
pins. When F
C
700
C
and IN
= 0.01 F
IN
IN
C
W
IN
= 0.1 F
800
= 0.01 F
800
+
= 0.1 F
+
or IN
or IN
900
2431 F15b
900
2431 F15a
–
1000
for large values
1000
–
–
(Large C
(Large C
IN
U
O
capacitor
= LOW
IN
IN
)
)
Figure 16. Offset Error vs Common Mode Voltage
(V
( R
(internal oscillator and 60Hz notch), every 1 mismatch
in source impedance transforms a full-scale common
mode input signal into a differential mode input signal of
0.023ppm. When F
notch), every 1 mismatch in source impedance trans-
forms a full-scale common mode input signal into a
differential mode input signal of 0.019ppm. When F
driven by an external oscillator with a frequency f
every 1
full-scale common mode input signal into a differential
mode input signal of 0.15 • 10
shows the typical offset error due to input common mode
voltage for various values of source resistance imbalance
between the IN
used.
If possible, it is desirable to operate with the input signal
common mode voltage very close to the reference signal
common mode voltage as is the case in the ratiometric
measurement of a symmetric bridge. This configuration
eliminates the offset error caused by mismatched source
impedances.
The magnitude of the dynamic input current depends upon
the size of the very stable internal sampling capacitors and
upon the accuracy of the converter sampling clock. The
accuracy of the internal clock over the entire temperature
and power supply range is typically better than 1%. Such
INCM
IN
= R
= V
SOURCEIN +
IN
–20
–40
+ = V
mismatch in source impedance transforms a
40
20
0
0
A: R
B: R
C: R
D: R
IN
A
B
C
D
E
G
F
+
0.5
–) and Input Source Resistance Imbalance
– R
and IN
IN
IN
IN
IN
O
1
= +1k
= +500
= +200
= 0
SOURCEIN –
= HIGH (internal oscillator and 50Hz
1.5
F
R
C
T
V
V
V
V
O
IN
A
SOURCEIN –
CC
REF +
REF –
IN +
–
= GND
= 25 C
= 10 F
2 2.5
= 5V
V
pins when large C
= V
INCM
= 5V
= GND
IN –
) for Large C
(V)
= 500
= V
3
–6
INCM
E: R
F: R
G: R
3.5
• f
IN
IN
IN
EOSC
4
= –200
= –500
= –1k
IN
4.5
2431 F16
Values (C
ppm. Figure 16
5
IN
values are
IN
EOSC
24301f
O
1 F)
is
,