LTC2431 Linear Technology, LTC2431 Datasheet - Page 23

• Manufacturer Part Number: LTC2431
• Description: (LTC2430 / LTC2431) 20-Bit No Latency Delta-Sigma ADCs
• Manufacturer: Linear Technology

APPLICATIO S I FOR ATIO
sampling charge transfers when integrated over a sub-
stantial time period (longer than 64 internal clock cycles).
The effect of this input dynamic current can be analyzed
using the test circuit of Figure 12. The C
includes the LTC2430/LTC2431 pin capacitance (5pF typi-
cal) plus the capacitance of the test fixture used to obtain
the results shown in Figures 13 and 14. A careful imple-
mentation can bring the total input capacitance (C
C
than the one predicted by Figures 13 and 14. For simplic-
ity, two distinct situations can be considered.
For relatively small values of input capacitance (C
0.01 F), the voltage on the sampling capacitor settles
almost completely and relatively large values for the
source impedance result in only small errors. Such values
for C
performance without significant benefits of signal filter-
ing and the user is advised to avoid them. Nevertheless,
when small values of C
parasitics of input multiplexers, wires, connectors or
sensors, the LTC2430 or LTC2431 can maintain its excep-
tional accuracy while operating with relative large values
of source resistance as shown in Figures 13 and 14. These
measured results may be slightly different from the first
order approximation suggested earlier because they in-
clude the effect of the actual second order input network
together with the nonlinear settling process of the input
amplifiers. For small C
IN
in trying to match the source impedance for the two pins.
Larger values of input capacitors (C
required in certain configurations for antialiasing or gen-
eral input signal filtering. Such capacitors will average the
input sampling charge and the external source resistance
will see a quasi constant input differential impedance.
When F
typical differential input resistance is 21.6M which will
generate a gain error of approximately 0.023ppm for each
ohm of source resistance driving IN
HIGH (internal oscillator and 50Hz notch), the typical
differential input resistance is 26M which will generate
a gain error of approximately 0.019ppm for each ohm of
source resistance driving IN
PAR
–
occurs almost independently and there is little benefit
) closer to 5pF thus achieving better performance
IN
O
will deteriorate the converter offset and gain
= LOW (internal oscillator and 60Hz notch), the
U
IN
IN
U
values, the settling on IN
+
are unavoidably present as
or IN
–
W
. When F
IN
+
or IN
> 0.01 F) may be
PAR
–
O
. When F
is driven by
U
capacitor
+
IN
IN
and
O
<
+
=
an external oscillator with a frequency f
conversion clock operation), the typical differential input
resistance is 3.3 • 10
resistance driving IN
f
the two input pins is additive with respect to this gain error.
EOSC
Figure 14. –FS Error vs R
Figure 13. +FS Error vs R
ppm gain error. The effect of the source resistance on
V
V
INCM
INCM
–10
–20
–30
–40
–50
–10
+ 0.5V
– 0.5V
50
40
30
20
10
Figure 12. An RC Network at IN
10
0
0
1
1
V
V
V
V
V
F
T
V
V
V
V
V
F
T
IN
IN
O
A
O
CC
REF
REF
IN
IN
A
CC
REF
REF
IN
IN
= GND
= 25 C
= GND
= 25 C
+
–
+
–
= 5V
= 5V
+
–
= 3.75V
= 1.25V
+
–
= 1.25V
= 3.75V
= 5V
= GND
= 5V
= GND
10
10
R
R
LTC2430/LTC2431
SOURCE
SOURCE
+
12
C
or IN
C
IN
C
C
/f
IN
100
R
C
100
IN
IN
R
= 0.001 F
IN
EOSC
SOURCE
SOURCE
= 0.001 F
= 0.01 F
SOURCE
= 100pF
SOURCE
C
= 100pF
IN
C
–
= 0.01 F
IN
C
C
( )
C
will result in 0.15 • 10
IN
IN
( )
= 0pF
1k
1k
IN
and each ohm of source
at IN
at IN
= 0pF
10k
10k
C
C
+
+
PAR
PAR
20pF
20pF
or IN
or IN
+
and IN
2431 F13
2431 F14
100k
100k
EOSC
–
–
IN
IN
LTC2430/
(Small C
LTC2431
(Small C
+
–
–
2431 F12
(external
23
IN
IN
)
24301f
)
–6
•