MM74HC374N Fairchild Semiconductor, MM74HC374N Datasheet

IC FLIP FLOP OCTAL D 3ST 20-DIP

MM74HC374N

Manufacturer Part Number
MM74HC374N
Description
IC FLIP FLOP OCTAL D 3ST 20-DIP
Manufacturer
Fairchild Semiconductor
Series
74HCr
Type
D-Type Busr
Datasheet

Specifications of MM74HC374N

Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
35MHz
Delay Time - Propagation
20ns
Trigger Type
Positive Edge
Current - Output High, Low
7.8mA, 7.8mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Number Of Circuits
8
Logic Family
74HC
Logic Type
D-Type Flip-Flop
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
230 ns
High Level Output Current
- 7.8 mA
Low Level Output Current
7.8 mA
Supply Voltage (max)
6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HC374

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MM74HC374N
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
Company:
Part Number:
MM74HC374N
Quantity:
2 000
© 2005 Fairchild Semiconductor Corporation
MM74HC374WM
MM74HC374SJ
MM74HC374MTC
MM74HC374N
MM74HC374
3-STATE Octal D-Type Flip-Flop
General Description
The MM74HC374 high speed Octal D-Type Flip-Flops uti-
lize advanced silicon-gate CMOS technology. They pos-
sess the high noise immunity and low power consumption
of standard CMOS integrated circuits, as well as the ability
to drive 15 LS-TTL loads. Due to the large output drive
capability and the 3-STATE feature, these devices are ide-
ally suited for interfacing with bus lines in a bus organized
system.
These devices are positive edge triggered flip-flops. Data
at the D inputs, meeting the setup and hold time require-
ments, are transferred to the Q outputs on positive going
transitions of the CLOCK (CK) input. When a high logic
level is applied to the OUTPUT CONTROL (OC) input, all
outputs go to a high impedance state, regardless of what
signals are present at the other inputs and the state of the
storage elements.
The 74HC logic family is speed, function, and pinout com-
patible with the standard 74LS logic family. All inputs are
protected from damage due to static discharge by internal
diode clamps to V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Pin Assignments for DIP, SOIC, SOP and TSSOP
CC
Package Number
and ground.
MTC20
Top View
M20D
M20B
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
DS005336
Features
Truth Table
H
L
X
n
Z
Q
established
0
Typical propagation delay: 20 ns
Wide operating voltage range: 2–6V
Low input current: 1
Low quiescent current: 80
Compatible with bus-oriented systems
Output drive capability: 15 LS-TTL loads
LOW Level
Transition from LOW-to-HIGH
Don't Care
High Impedance State
HIGH Level
Control
Output
The level of the output before steady state input conditions were
Package Description
H
L
L
L
Clock
n
n
X
L
P
A maximum
P
A maximum
September 1983
Revised May 2005
Data
H
X
X
L
www.fairchildsemi.com
Output
Q
H
L
Z
0

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MM74HC374N Summary of contents

Page 1

... Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC374MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC374N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Output Voltage (V ) OUT Clamp Diode Current ( Output Current, per pin (I ) ...

Page 3

AC Electrical Characteristics q 5V Symbol Parameter f Maximum Operating MAX Frequency Maximum Propagation PHL PLH Delay Clock Maximum Output ...

Page 4

AC Electrical Characteristics  2.0 6.0V pF (unless otherwise specified Symbol Parameter Conditions f Maximum Operating MAX L Frequency Maximum Propagation C 50 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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