CY7C4265V-10ASC Cypress Semiconductor Corp, CY7C4265V-10ASC Datasheet - Page 17

IC DEEP SYN FIFO 16KX18 64LQFP

CY7C4265V-10ASC

Manufacturer Part Number
CY7C4265V-10ASC
Description
IC DEEP SYN FIFO 16KX18 64LQFP
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Datasheet

Specifications of CY7C4265V-10ASC

Function
Synchronous
Memory Size
288K (16K x 18)
Data Rate
100MHz
Access Time
8ns
Voltage - Supply
3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1236
Depth Expansion Configuration
(with Programmable Flags)
The CY7C4255/65/75/85V can easily be adapted to applica-
tions requiring more than 8K/16K/32K/64K words of buffering.
Figure 2 shows Depth Expansion using three CY7C4255/65/
75/85Vs. Maximum depth is limited only by signal loading. Fol-
low these steps:
Document #: 38-06012 Rev. *A
1. The first device must be designated by grounding the First
2. All other devices must have FL in the HIGH state.
DATAIN (D)
Load (FL) control input.
LOAD (LD)
Figure 2. Block Diagram of 8K/16K/32K/64K x 18 Low-Voltage Synchronous FIFO Memory
FF
PAF
WRITE CLOCK (WCLK)
WRITE ENABLE (WEN)
RESET (RS)
with Programmable Flags used in Depth Expansion Configuration
FIRST LOAD (FL)
V
V
CC
CC
FF
PAF
FF
PAF
FF
PAF
FL
FL
WXO RXO
WXO RXO
WXO RXO
7C4255V
7C4265V
7C4275V
7C4285V
7C4255V
7C4265V
7C4275V
7C4285V
WXI RXI
WXI RXI
WXI RXI
7C4255V
7C4265V
7C4275V
7C4285V
3. The Write Expansion Out (WXO) pin of each device must
4. The Read Expansion Out (RXO) pin of each device must be
5. All Load (LD) pins are tied together.
6. The Half-Full Flag (HF) is not available in the Depth Expan-
7. EF, FF, PAE, and PAF are created with composite flags by
PAE
PAE
PAE
EF
EF
EF
be tied to the Write Expansion In (WXI) pin of the next
device.
tied to the Read Expansion In (RXI) pin of the next device.
sion Configuration.
ORing together these respective flags for monitoring. The
composite PAE and PAF flags are not precise.
OUTPUT ENABLE (OE)
READ CLOCK (RCLK)
READ ENABLE (REN)
CY7C4255V/CY7C4265V
CY7C4275V/CY7C4285V
PAE
EF
DATA OUT (Q)
Page 17 of 20
4275V–25

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