CY7C4265V-10ASC Cypress Semiconductor Corp, CY7C4265V-10ASC Datasheet - Page 11

• Manufacturer Part Number: CY7C4265V-10ASC
• Description: IC DEEP SYN FIFO 16KX18 64LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C4265V-10ASC

• Function: Synchronous
• Memory Size: 288K (16K x 18)
• Data Rate: 100MHz
• Access Time: 8ns
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1236

Switching Waveforms
Document #: 38-06012 Rev. *A
Programmable Almost Empty Flag Timing (applies only in SMODE (SMODE is LOW))
Programmable Almost Full Flag Timing
Notes:
21. PAE offset
22. t
23. If a read is performed on this rising edge of the read clock, there will be Empty + (n 1) words in the FIFO when PAE goes LOW.
24. PAF offset = m. Number of data words written into FIFO already = 8192
25. PAF is offset = m.
26. 8192
27. 8192 (m + 1) words in CY7C4255V, 16384 (m + 1) words in CY7C4265V, 32768 (m + 1) words in CY7C4275V, and 65536 (m + 1) words in CY7C4285V.
PAF
WCLK
WCLK
rising RCLK is less than t
1) for the CY7C4275V, and 65536
SKEW3
RCLK
RCLK
WEN
WEN
REN
REN
PAE
[25]
is the minimum time between a rising WCLK and a rising RCLK edge for PAE to change state during that clock cycle. If the time between the edge of WCLK and the
m words in CY7C4255V, 16384
n.
t
CLKH
SKEW3
, then PAE may not change state until the next RCLK.
(continued)
(m + 1) for the CY7C4285V.
t
SKEW3
t
CLKH
m words in CY7C4265V, 32768 m words in CY7C4275V, and 65536
t
ENS
[22]
t
ENH
t
CLKL
Note
Note
24
t
ENS
21
(m + 1) for the CY7C4255V, 16384
t
ENH
t
t
PAE synch
CLKL
t
PAF
t
t
ENS
ENS
FULL– M WORDS
N + 1 WORDS
IN FIFO
IN FIFO
CY7C4255V/CY7C4265V
CY7C4275V/CY7C4285V
t
ENS
[26]
t
PAF
(m + 1) for the CY7C4265V, 32768
t
ENH
m words in CY7C4285V.
FULL– (M+1) WORDS
Note
IN FIFO
23
Page 11 of 20
t
PAE synch
[27]
4275V–16
4275V–17
(m +